Capgemini Engineering

Capgemini Engineering

25 open semiconductor roles on SiliconBoard

Open positions at Capgemini Engineering

Analog and RF Layout Engineer

San Francisco, CA

Full-Time Mid-senior Design
3d ago

Mechanical Design Engineer

Bengaluru, Karnataka, India

Full-Time Associate Manufacturing
1w ago

Senior Electronic Characterization Engineer

Palo Alto, CA

Full-Time Associate Test
1w ago

Hardware Test and Validation Engineer

Palo Alto, CA

Full-Time Mid-senior Test
3w ago

ASIC CAD/EDA Flow Developer

San Jose, CA

Full-Time Associate Design
3w ago

Senior Design Quality Engineer

Andover, MA

Full-Time Mid-senior Verification
26 May 2026

Lead V&V QA Engineer - MedTech

Andover, MA

Full-Time Associate Test
19 May 2026

Senior Digital Engineer - Apriso

Atlanta, GA

Full-Time Mid-senior Test
19 May 2026

Lead V&V QA Engineer - MedTech

Burlington, VT

Full-Time Mid-senior Test
19 May 2026

Sr Digital Engineer

United States

Full-Time Mid-senior Test
18 May 2026

Senior Functional Safety Engineer

United States

Full-Time Mid-senior Test
13 May 2026

High-Speed Design validation Engineer

Irvine, CA

Full-Time Mid-senior Test
11 May 2026

WiFi Test Engineer

Philadelphia, PA

Full-Time Mid-senior Test
11 May 2026

Senior Electrical Design & Validation Engineer

Santa Clara, CA

Full-Time Associate Test
30 Apr 2026

Mechanical Engineer

Bellevue, WA

Full-Time Mid-senior Test
28 Apr 2026

Equipment Validation Engineer

Nashville, TN

Full-Time Mid-senior Test
28 Apr 2026

V&V Engineer - AI-Driven Testing & Validation

Dallas, TX

Full-Time Mid-senior Test
27 Apr 2026

Equipment Validation Engineer

Atlanta, GA

Full-Time Mid-senior Test
27 Apr 2026

CSV - Validation Engineer

Nashville, TN

Full-Time Mid-senior Manufacturing
23 Apr 2026

Equipment - Validation Engineer

Nashville, TN

Full-Time Mid-senior Manufacturing
23 Apr 2026

Electrical Design Validation Engineer

San Jose, CA

Full-Time Mid-senior Test
21 Apr 2026

Electrical Design Validation Engineer

San Jose, CA

Full-Time Mid-senior Test
21 Apr 2026

Custom ASIC Lead Engineer – RTL to GDSII

Santa Clara County, United States, North America

Full-Time Mid Design
15 Apr 2026

ASIC Design verification Engineer

United States, United States, North America

Full-Time Senior Verification
7 Apr 2026

RTL Design Engineer

Bangalore Urban, Karnataka, India

Full-Time Mid-senior Design
29 Mar 2026