CE

Custom ASIC Lead Engineer – RTL to GDSII

Accepting applications

Capgemini Engineering · Santa Clara County, United States, North America

Full-Time Mid AIASICCadenceRTLSic
Posted
15 Apr
Category
Design
Experience
Mid
Country
United States

Choosing Capgemini means choosing a company where you will be empowered to shape your career in the way you’d like, where you’ll be supported and inspired by a collaborative community of colleagues around the world, and where you’ll be able to reimagine what’s possible. Join us and help the world’s leading organizations unlock the value of technology and build a more sustainable, more inclusive world.


About the job you are considering

Custom ASIC Lead Engineer will contribute to the development of next‑generation SoCs for hi‑tech, consumer, and automotive applications. This role requires strong hands‑on experience in front‑end SoC design, with working knowledge of the full RTL‑to‑GDSII flow. The engineer will collaborate closely with architecture, verification, and physical design teams to ensure successful design convergence.


Your Role

  • Contribute to full‑chip SoC design for multi‑million gate designs
  • Perform digital design and RTL development based on architectural specifications
  • Work closely with architects to understand system architecture and micro‑architecture
  • Support the design convergence cycle, including synthesis, timing closure, and verification
  • Manage and integrate internal and third‑party IP blocks
  • Track and execute front‑end design deliverables and milestones
  • Collaborate with verification and physical design teams to resolve design issues
  • Review and provide input on top‑level verification plans
  • Interface with manufacturing, test, and VCA partners as required
  • Support silicon brings‑up by debugging design‑related issues


Your skills and experience

  • 10+ years of hands‑on experience in ASIC / SoC design
  • Strong experience developing RTL from specifications
  • Solid understanding of SoC integration and front‑end design flows
  • Good working knowledge of bus protocols such as AMBA AHB and AXI
  • Familiarity with common peripherals (e.g., USB, SD/MMC)
  • Experience with Synopsys Design Compiler for RTL synthesis
  • Working knowledge of formal equivalence checking (e.g., Cadence LEC)
  • Strong understanding of timing constraints and timing closure concepts
  • Ability to debug design issues at block and SoC levels
  • Good problem‑solving skills and ability to make sound decisions with limited information


Preferred / Added Advantages

  • Experience with memory controller design or microprocessor‑based systems
  • Exposure to chip I/O design and packaging concepts
  • Basic understanding of physical design interactions and sign‑off requirements
  • Prior experience in automotive or consumer SoC programs


The base compensation range for this role in the posted location is $97,700 to $203,800 per year.

Capgemini provides compensation range information in accordance with applicable national, state, provincial, and local pay transparency laws. The base compensation range listed for this position reflects the minimum and maximum target compensation Capgemini, in good faith, believes it may pay for the role at the time of this posting. This range may be subject to change as permitted by law.

The actual compensation offered to any candidate may fall outside of the posted range and will be determined based on multiple factors legally permitted in the applicable jurisdiction.

These may include, but are not limited to Geographic location, Education and qualifications, Certifications and licenses, Relevant experience and skills, Seniority and performance, Market and business consideration, Internal pay equity.

It is not typical for candidates to be hired at or near the top of the posted compensation range.

In addition to base salary, this role may be eligible for additional compensation such as variable incentives, bonuses, or commissions, depending on the position and applicable laws.

Capgemini offers a comprehensive, non-negotiable benefits package to all regular, full-time employees. In the U.S. and Canada, available benefits are determined by local policy and eligibility and may include

  • Paid time off based on employee grade (A-F), defined by policy Vacation 12-25 days, depending on grade, Company paid holidays, Personal Days, Sick Leave
  • Medical, dental, and vision coverage (or provincial healthcare coordination in Canada)
  • Retirement savings plans (e.g., 401(k) in the U.S., RRSP in Canada)
  • Life and disability insurance
  • Employee assistance programs
  • Other benefits as provided by local policy and eligibility


Important Notice Compensation (including bonuses, commissions, or other forms of incentive pay) is not considered earned, vested, or payable until it becomes due under the terms of applicable plans or agreements and is subject to Capgemini’s discretion, consistent with applicable laws. The Company reserves the right to amend or withdraw compensation programs at any time, within the limits of applicable legislation.

Disclaimers

Capgemini is an Equal Opportunity Employer encouraging inclusion in the workplace. Capgemini also participates in the Partnership Accreditation in Indigenous Relations (PAIR) program which supports meaningful engagement with Indigenous communities across Canada by promoting fairness, accessibility, inclusion and respect. We value the rich cultural heritage and contributions of Indigenous Peoples and actively work to create a welcoming and respectful environment. All qualified applicants will receive consideration for employment without regard to race, national origin, gender identity/expression, age, religion, disability, sexual orientation, genetics, veteran status, marital status or any other characteristic protected by law.

This is a general description of the Duties, Responsibilities and Qualifications required for this position. Physical, mental, sensory or environmental demands may be referenced in an attempt to communicate the manner in which this position traditionally is performed. Whenever necessary to provide individuals with disabilities an equal employment opportunity, Capgemini will consider reasonable accommodations that might involve varying job requirements and/or changing the way this job is performed, provided that such accommodation does not pose an undue hardship. Capgemini is committed to providing reasonable accommodation during our recruitment process. If you need assistance or accommodation, please reach out to your recruiting contact.

Please be aware that Capgemini may capture your image (video or screenshot) during the interview process and that image may be used for verification, including during the hiring and onboarding process.

Click the following link for more information on your rights as an Applicant in the United States. http//www.capgemini.com/resources/equal-employment-opportunity-is-the-law

Capgemini is a global business and technology transformation partner, helping organizations to accelerate their dual transition to a digital and sustainable world, while creating tangible impact for enterprises and society. It is a responsible and diverse group of 340,000 team members in more than 50 countries. With its strong over 55-year heritage, Capgemini is trusted by its clients to unlock the value of technology to address the entire breadth of their business needs. It delivers end-to-end services and solutions leveraging strengths from strategy and design to engineering, all fueled by its market leading capabilities in AI, generative AI, cloud and data, combined with its deep industry expertise and partner ecosystem.