CE

Analog and RF Layout Engineer

Accepting applications

Capgemini Engineering · San Francisco, CA

Full-Time Mid_senior AIAnalogCMOSCadenceFinFET
Posted
1d ago
Category
Design
Experience
Mid_senior
Country
United States
At Capgemini Engineering, the world leader in engineering services, we bring together a global team of engineers, scientists, and architects to help the world’s most innovative companies unleash their potential. From autonomous cars to life-saving robots, our digital and software technology experts think outside the box as they provide unique R&D and engineering services across all industries. Join us for a career full of opportunities. Where you can make a difference. Where no two days are the same.

About The Job You Are Considering

As a Senior Analog / RF IC Layout Engineer, you will play a critical role in designing and enabling cutting‑edge high‑speed mixed‑signal silicon for next‑generation technologies. You will collaborate with world‑class design, verification, and process teams to deliver robust, scalable layouts in advanced FinFET nodes that power high‑performance products across industries

Your Role

Lead and contribute to the physical layout of complex, high‑speed analog and RF mixed‑signal blocks from concept through tape‑out
Develop and implement block‑level and chip‑level layouts in advanced CMOS FinFET technologies (7nm and below)
Partner closely with analog, RF, and digital designers to ensure layout quality, performance, and manufacturability
Own floor planning, block‑level routing, and top‑level chip assembly activities for complex integrated circuits
Apply best‑in‑class layout techniques to address signal integrity, electromigration, thermal awareness, and high‑speed performance
Drive layout reviews, layout verification, and design rule compliance using industry‑standard EDA tools
Mentor and guide junior engineers while promoting quality, collaboration, and engineering best practices

Your Skills And Experience

6+ years of experience in Analog and RF IC layout for high‑speed applications
Hands‑on experience developing and leading complex layouts at both block and full‑chip levels in advanced FinFET technologies (7nm and below)
Strong expertise using industry‑standard EDA tools from Cadence, Mentor, and Synopsys
Proven experience with layout of high‑performance analog mixed‑signal blocks, such as
High‑speed transceivers
CMOS drivers
High‑speed data converters
PLLs
Solid understanding of floorplanning, routing, layer generation, thermal‑aware layout practices, and electromigration considerations

Capgemini is a global business and technology transformation partner, helping organizations to accelerate their dual transition to a digital and sustainable world, while creating tangible impact for enterprises and society. It is a responsible and diverse group of 340,000 team members in more than 50 countries. With its strong over 55-year heritage, Capgemini is trusted by its clients to unlock the value of technology to address the entire breadth of their business needs. It delivers end-to-end services and solutions leveraging strengths from strategy and design to engineering, all fueled by its market leading capabilities in AI, generative AI, cloud and data, combined with its deep industry expertise and partner ecosystem.
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