S

Sr design verification engineer

Accepting applications

Sivaltech · San Diego, CA

Full-Time Mid_senior ASICSoCSystemVerilogUVMVHDL
Posted
3d ago
Category
Design
Experience
Mid_senior
Country
United States
🚀 We're Hiring: Design Verification Engineer 🚀

Location: Bay Area, California (Onsite)
Experience: 8+ Years

Sivaltech is looking for an experienced Design Verification Engineer to join a cutting-edge semiconductor team working on advanced SoC/IP verification.

Key Skills:
✅ SystemVerilog
✅ UVM Methodology
✅ Assertions (SVA)
✅ Functional Coverage
✅ Verilog/VHDL
✅ SoC/IP Verification
✅ Debugging & Verification Planning

Requirements:

- 8+ years of hands-on Design Verification experience
- Strong expertise in SystemVerilog and UVM
- Experience with SoC/IP verification and debugging
- Excellent communication and problem-solving skills
- Must be authorized to work in the U.S.

📍 Location: Bay Area, CA (Onsite)

📩 Interested candidates, please send your resume to [email protected] or connect with me on LinkedIn.

Know someone who would be a great fit? Feel free to like, comment, and share!

#Hiring #DesignVerification #DV #SystemVerilog #UVM #Semiconductor #ASIC #VLSI #SoC #BayAreaJobs #EngineeringJobs #Sivaltech
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