T

Sr.Analog Layout Engineer

Accepting applications

Tessolve · San Jose, CA

Contract Mid_senior ASICAnalogCadenceSERDES
Posted
2d ago
Category
Design
Experience
Mid_senior
Country
United States
Hi All,
One of our valued customer is looking for Sr. Analog Layout Engineer at Bay Area, CA

Sr.Analog Layout Engineer
Bay Area,CA
Longterm Contract

Exp : Minimum 8 years and above
Skill : 2nm, 3nm and 5nm process and high speed layout (Must)
Blocks : LDO ,ADC and SERDES
Tools : Cadence ,Virtuoso XL

Please share resume : amritanshuman.swain@tessolve.com

About us:
Tessolve Semiconductors, a venture of Hero Electronix, is a Design and Test Engineering Service Company providing End to End Solutions from Product Engineering, Software, Hardware, Wireless, Automotive and Embedded Solutions. Tessolve offers a unique combination of pre-silicon and post-silicon expertise to provide an efficient
turnkey solution for silicon bring-up, spec to the product. With 3500+ employees worldwide,Tessolve provides a one-stop-shop solution with full-fledged hardware and software capabilities, including its advanced silicon and system testing labs. Tessolve offers a Turnkey ASIC Solution, from design to packaged parts. We have a global presence
with office locations in the United States, India, Singapore, Malaysia, Germany, United Kingdom, China, UK, Japan, Thailand, Philippines, and Test Labs in India, Singapore, Malaysia, Austin, San Jose.Tessolve offers a highly competitive compensation and benefits along with an electric work environment to scale one’s intellect, skills and growth.
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