LM
ASIC & FPGA Design Engineer - E2
Accepting applicationsLockheed Martin · Orlando, FL
Full-Time Associate ASICC++FPGAPythonRTL
Posted
1d ago
Category
Design
Experience
Associate
Country
United States
Standard Job Description
You will be the ASIC & FPGA Design Engineer for the ASIC/FPGA department at Lockheed Martin Missiles and Fire Control. Our team creates FPGA‑based architectures that power current and next‑generation defense systems, delivering highly reliable, high‑performance digital solutions for mission‑critical applications.
What You Will Be Doing
As the ASIC & FPGA Design Engineer you will own the end‑to‑end development of complex FPGA designs—from requirements definition and architecture through RTL coding, verification, synthesis, and timing closure. You’ll partner with software, hardware, and systems engineers to shape optimal architectures, manage configuration control, and ensure seamless board‑level integration and testing.
Your Responsibilities Will Include
Translating system requirements into FPGA specifications, architectural diagrams, and detailed RTL (VHDL/Verilog/SystemVerilog).
Writing self‑checking testbenches and performing unit‑test, functional, and regression verification.
Running synthesis, place‑and‑route, and timing analyses, and iterating designs to meet utilization, power, and thermal targets.
Conducting trade‑off studies that evaluate device utilization, power consumption, and thermal performance.
Designing high‑speed serial interfaces, processor‑subsystem features, and data‑path architectures within the FPGA.
Collaborating with software, hardware, and systems teams to define requirements and optimize overall system architecture.
Supporting Design Architecture Development (DAD) processes and participating in Design Assurance reviews.
Managing version control and configuration management using Git/GitLab or similar tools, and maintaining up‑to‑date design documentation and artifacts.
Performing board‑level integration, debugging, and troubleshooting in the laboratory environment.
Applying circuit‑design and analysis techniques to validate signal integrity and power distribution for the FPGA solution.
Why Join Us
Do you want to be part of a company culture that empowers employees to think big, lead with a growth mindset, and make the impossible a reality? We provide the resources and give you the flexibility to enable inspiration and focus. If you have the passion and courage to dream big, work hard, and have fun doing what you love then we want to build a better tomorrow with you.
We offer flexible work schedules to comprehensive benefits investing in your future and security. Learn more about Lockheed Martin’s comprehensive benefits package here.
Further Information About This Opportunity
This position is in Orlando, FL. Discover more about our Orlando, Florida location.
MUST BE A U.S. CITIZEN - This position is located at a facility that requires special access. The selected candidate must be able to obtain a secret clearance.
Basic Qualifications
Bachelor of Science degree in Electrical Engineering or a closely related STEM field from an accredited university
Minimum 1 year of professional experience with FPGA design and simulation verification or a related discipline
HDL programming experience with VHDL, Verilog, and/or SystemVerilog
Experience with Xilinx/AMD FPGAs and related toolsets such as Vivado
Experience with FPGA simulation tools and languages such as Synopsys VCS and SystemVerilog
Strong understanding of digital design principles, including timing analysis, clock domain crossing, and signal integrity
Experience in hardware-software integration and validation
Demonstrated effective communication, collaboration, and presentation skills
Must be a U.S. Citizen; must be able to obtain/maintain a DoD Secret clearance
Desired Skills
Experience with cybersecurity requirements, implementation, and verification
Experience with version control systems such as Git
Experience with multiple FPGA vendors such as Altera/Intel and MicroSemi/Microchip
Knowledge of software programming languages such as C, C++, or Python
Experience with debugging and troubleshooting complex digital systems
Knowledge of UVM and experience with UVM-based verification methodologies
Experience with the MFC DAR process
Experience with Synopsys Synplify, Synopsys VCS, NCSim, and ChipScope tool sets
Experience with Xilinx/AMD and MicroSemi/Microchip part families, internal FPGA fabric, and IP
Previous experience related to aerospace design techniques
Prior experience with Lockheed Martin MFC
Active DoD Secret or Top Secret clearance
Pay Information
Full-Time Salary Range: $81100.00 - $150500.00
At Lockheed Martin, we know mission success starts with taking care of our people. Our Total Rewards program is designed to attract top talent, support your well-being, and help you grow—both professionally and personally.
The salary range for this position is as listed on the requisition. Please note that the salary information listed is a general guideline only. Lockheed Martin considers factors such as (but not limited to) scope and responsibilities of the position, candidate's work experience, education/ training, key skills as well as market(work location) and business considerations when extending an offer.
Benefits offered: Medical, Dental, Vision, Flexible work arrangements and schedules (e.g., 4x10), 401(k) match, Paid time off, Holidays, Parental Leave, EAP, Flexible Spending Accounts, Education Assistance, Life Insurance, Short-Term Disability, and Long-Term Disability.
Annual short-term and/or long-term incentive compensation programs may be offered depending on the position. Payments under these annual programs are not guaranteed and can vary from year to year and are tied to a range of performance metrics.
For (Washington state applicants only) Non-represented full-time employees: accrue at least 10 hours per month of Paid Time Off (PTO) to be used for incidental absences and other reasons; receive at least 90 hours for holidays. Represented full time employees accrue 6.67 hours of Vacation per month; accrue up to 52 hours of sick leave annually; receive at least 96 hours for holidays. PTO, Vacation, sick leave, and holiday hours are prorated based on start date during the calendar year.
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You will be the ASIC & FPGA Design Engineer for the ASIC/FPGA department at Lockheed Martin Missiles and Fire Control. Our team creates FPGA‑based architectures that power current and next‑generation defense systems, delivering highly reliable, high‑performance digital solutions for mission‑critical applications.
What You Will Be Doing
As the ASIC & FPGA Design Engineer you will own the end‑to‑end development of complex FPGA designs—from requirements definition and architecture through RTL coding, verification, synthesis, and timing closure. You’ll partner with software, hardware, and systems engineers to shape optimal architectures, manage configuration control, and ensure seamless board‑level integration and testing.
Your Responsibilities Will Include
Translating system requirements into FPGA specifications, architectural diagrams, and detailed RTL (VHDL/Verilog/SystemVerilog).
Writing self‑checking testbenches and performing unit‑test, functional, and regression verification.
Running synthesis, place‑and‑route, and timing analyses, and iterating designs to meet utilization, power, and thermal targets.
Conducting trade‑off studies that evaluate device utilization, power consumption, and thermal performance.
Designing high‑speed serial interfaces, processor‑subsystem features, and data‑path architectures within the FPGA.
Collaborating with software, hardware, and systems teams to define requirements and optimize overall system architecture.
Supporting Design Architecture Development (DAD) processes and participating in Design Assurance reviews.
Managing version control and configuration management using Git/GitLab or similar tools, and maintaining up‑to‑date design documentation and artifacts.
Performing board‑level integration, debugging, and troubleshooting in the laboratory environment.
Applying circuit‑design and analysis techniques to validate signal integrity and power distribution for the FPGA solution.
Why Join Us
Do you want to be part of a company culture that empowers employees to think big, lead with a growth mindset, and make the impossible a reality? We provide the resources and give you the flexibility to enable inspiration and focus. If you have the passion and courage to dream big, work hard, and have fun doing what you love then we want to build a better tomorrow with you.
We offer flexible work schedules to comprehensive benefits investing in your future and security. Learn more about Lockheed Martin’s comprehensive benefits package here.
Further Information About This Opportunity
This position is in Orlando, FL. Discover more about our Orlando, Florida location.
MUST BE A U.S. CITIZEN - This position is located at a facility that requires special access. The selected candidate must be able to obtain a secret clearance.
Basic Qualifications
Bachelor of Science degree in Electrical Engineering or a closely related STEM field from an accredited university
Minimum 1 year of professional experience with FPGA design and simulation verification or a related discipline
HDL programming experience with VHDL, Verilog, and/or SystemVerilog
Experience with Xilinx/AMD FPGAs and related toolsets such as Vivado
Experience with FPGA simulation tools and languages such as Synopsys VCS and SystemVerilog
Strong understanding of digital design principles, including timing analysis, clock domain crossing, and signal integrity
Experience in hardware-software integration and validation
Demonstrated effective communication, collaboration, and presentation skills
Must be a U.S. Citizen; must be able to obtain/maintain a DoD Secret clearance
Desired Skills
Experience with cybersecurity requirements, implementation, and verification
Experience with version control systems such as Git
Experience with multiple FPGA vendors such as Altera/Intel and MicroSemi/Microchip
Knowledge of software programming languages such as C, C++, or Python
Experience with debugging and troubleshooting complex digital systems
Knowledge of UVM and experience with UVM-based verification methodologies
Experience with the MFC DAR process
Experience with Synopsys Synplify, Synopsys VCS, NCSim, and ChipScope tool sets
Experience with Xilinx/AMD and MicroSemi/Microchip part families, internal FPGA fabric, and IP
Previous experience related to aerospace design techniques
Prior experience with Lockheed Martin MFC
Active DoD Secret or Top Secret clearance
Pay Information
Full-Time Salary Range: $81100.00 - $150500.00
At Lockheed Martin, we know mission success starts with taking care of our people. Our Total Rewards program is designed to attract top talent, support your well-being, and help you grow—both professionally and personally.
The salary range for this position is as listed on the requisition. Please note that the salary information listed is a general guideline only. Lockheed Martin considers factors such as (but not limited to) scope and responsibilities of the position, candidate's work experience, education/ training, key skills as well as market(work location) and business considerations when extending an offer.
Benefits offered: Medical, Dental, Vision, Flexible work arrangements and schedules (e.g., 4x10), 401(k) match, Paid time off, Holidays, Parental Leave, EAP, Flexible Spending Accounts, Education Assistance, Life Insurance, Short-Term Disability, and Long-Term Disability.
Annual short-term and/or long-term incentive compensation programs may be offered depending on the position. Payments under these annual programs are not guaranteed and can vary from year to year and are tied to a range of performance metrics.
For (Washington state applicants only) Non-represented full-time employees: accrue at least 10 hours per month of Paid Time Off (PTO) to be used for incidental absences and other reasons; receive at least 90 hours for holidays. Represented full time employees accrue 6.67 hours of Vacation per month; accrue up to 52 hours of sick leave annually; receive at least 96 hours for holidays. PTO, Vacation, sick leave, and holiday hours are prorated based on start date during the calendar year.
Show more Show less