ET
Software Engineer
Accepting applicationsEuropean Tech Recruit · San Francisco Bay Area
Full-Time Mid_senior AIASICCadencePythonSoC
Posted
22 Apr
Category
Eda
Experience
Mid_senior
Country
United States
Founding Silicon Engineer - San Francisco, CA - $175,000 – $220,000 + Equity
They're a VC-backed startup building the future of AI-native hardware engineering, looking for someone with a passion for applying AI to the most complex problems in the semiconductor industry. You will architect reasoning systems that automate chip verification, moving beyond traditional manual workflows to build "AI agents" that capture the intuition of the world's best verification engineers.
What You’ll Do
Contribute to the architecture of domain-specific AI reasoning systems for complex chip verification.
Own and expand tool integrations between our AI platform and industry-standard EDA environments (Synopsys, Cadence, Questa).
Work hands-on with CAD/EDA tooling to test and validate AI-generated outputs against real-world environments.
Deploy directly into customer workflows, collaborating with verification teams at leading chip companies.
Translate silicon intuition into new product features, shaping the roadmap of an early-stage venture.
Requirements
2–8 years of experience in ASIC/SoC design and verification.
Deep proficiency in SystemVerilog, UVM, and Python/Tcl.
Proven experience with EDA tools (Synopsys, Cadence, etc.).
A Degree in CS, CE, or EE from a top-tier university.
A strong interest in (or experience with) applying AI/ML to hardware design.
Startup mindset: You prefer fast-paced, high-growth environments over legacy corporate structures.
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They're a VC-backed startup building the future of AI-native hardware engineering, looking for someone with a passion for applying AI to the most complex problems in the semiconductor industry. You will architect reasoning systems that automate chip verification, moving beyond traditional manual workflows to build "AI agents" that capture the intuition of the world's best verification engineers.
What You’ll Do
Contribute to the architecture of domain-specific AI reasoning systems for complex chip verification.
Own and expand tool integrations between our AI platform and industry-standard EDA environments (Synopsys, Cadence, Questa).
Work hands-on with CAD/EDA tooling to test and validate AI-generated outputs against real-world environments.
Deploy directly into customer workflows, collaborating with verification teams at leading chip companies.
Translate silicon intuition into new product features, shaping the roadmap of an early-stage venture.
Requirements
2–8 years of experience in ASIC/SoC design and verification.
Deep proficiency in SystemVerilog, UVM, and Python/Tcl.
Proven experience with EDA tools (Synopsys, Cadence, etc.).
A Degree in CS, CE, or EE from a top-tier university.
A strong interest in (or experience with) applying AI/ML to hardware design.
Startup mindset: You prefer fast-paced, high-growth environments over legacy corporate structures.
Show more Show less