IT
Software Architect – QNX / Hypervisor
Accepting applicationsIravan Technologies · Pune City, Maharashtra, India
Full-Time Mid_senior SoCmentor
Estimated market salary
₹7-12 LPA
This is a SiliconBoard market estimate, not an employer-posted salary.
Posted
2d ago
Category
Design
Experience
Mid_senior
Country
India
Experience Level: 10+ Years
Role Type: Architect / Technical Lead
Location: Pune / Bangalore / Hyderabad
Position Summary
This safe-critical infrastructure specialist focuses on the virtualization layer. They ensure that un-trusted
infotainment software (like Android guest OS) can run alongside safety-critical real-time applications (like
instrument clusters) on the same SoC without interference.
Key Responsibilities
•Drive the low-level, system-level software design for QNX RTOS and Type-1 Hypervisor architectures.
•Design high-performance, secure Inter-Process Communication (IPC) mechanisms between
virtualized guest operating systems.
•Architect hardware passthrough, device virtualization, and shared-resource scheduling rules (GPU,
Audio, Peripherals).
•Enforce freedom-from-interference (FFI) to isolate safety-critical clusters from infotainment
environments.
•Define secure boot and hardware security module (HSM) integration strategy for the virtualization
layer.
•Review low-level designs, mentor engineers, and enforce coding and safety-partitioning standards.
•Collaborate with silicon vendors and hardware teams on BSP and hypervisor bring-up.
Required Technical Skills
•BlackBerry QNX Neutrino RTOS, QNX Hypervisor, or similar embedded virtualization stacks (e.g.,
OpenSynergy, COVESA).
•IPC design (PPS, QNX native messaging), Board Support Packages (BSP), and device driver
development.
•Strong grounding in Qualcomm Snapdragon Ride, NVIDIA DRIVE Orin/Rubin, or NXP S32G processor
architectures.
•Safety isolation expertise: ASIL-B to ASIL-D structural partitioning, secure boot chains, and hardware
security module (HSM) hooks.
Preferred Skills
•Experience architecting hypervisor-based consolidation of safety-critical and infotainment domains
on a single SoC.
•Exposure to GPU, audio, or peripheral virtualization and shared-resource scheduling design.
•Familiarity with ISO 26262 functional safety processes applied to virtualization layers.
•Experience working directly with silicon vendors on BSP/hypervisor bring-up.
Education
•B.E. / B.Tech / M.Tech in Computer Science, Electronics, Electrical Engineering, or related discipline.
Project Experience
•Demonstrated ownership of QNX/hypervisor-based system architecture on at least one production or
pre-production vehicle program.
•Experience isolating safety-critical clusters from infotainment guest OS on a shared SoC.
Soft Skills
•Strong low-level systems architecture and safety-partitioning judgment.
•Technical leadership and mentoring ability.
•Clear documentation and communication with hardware, safety, and silicon teams.
Good to Have
•Direct experience with ASIL-D structural partitioning on production programs.
•Familiarity with secure boot chains and HSM-based key management.
•Experience with multiple guest OS combinations (Android, Linux, RTOS) under a single hypervisor.
Expected Deliverables
•QNX/Hypervisor system architecture and IPC design specification.
•Hardware passthrough, device virtualization, and scheduling design documentation.
•Freedom-from-interference and safety-partitioning compliance evidence.
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Role Type: Architect / Technical Lead
Location: Pune / Bangalore / Hyderabad
Position Summary
This safe-critical infrastructure specialist focuses on the virtualization layer. They ensure that un-trusted
infotainment software (like Android guest OS) can run alongside safety-critical real-time applications (like
instrument clusters) on the same SoC without interference.
Key Responsibilities
•Drive the low-level, system-level software design for QNX RTOS and Type-1 Hypervisor architectures.
•Design high-performance, secure Inter-Process Communication (IPC) mechanisms between
virtualized guest operating systems.
•Architect hardware passthrough, device virtualization, and shared-resource scheduling rules (GPU,
Audio, Peripherals).
•Enforce freedom-from-interference (FFI) to isolate safety-critical clusters from infotainment
environments.
•Define secure boot and hardware security module (HSM) integration strategy for the virtualization
layer.
•Review low-level designs, mentor engineers, and enforce coding and safety-partitioning standards.
•Collaborate with silicon vendors and hardware teams on BSP and hypervisor bring-up.
Required Technical Skills
•BlackBerry QNX Neutrino RTOS, QNX Hypervisor, or similar embedded virtualization stacks (e.g.,
OpenSynergy, COVESA).
•IPC design (PPS, QNX native messaging), Board Support Packages (BSP), and device driver
development.
•Strong grounding in Qualcomm Snapdragon Ride, NVIDIA DRIVE Orin/Rubin, or NXP S32G processor
architectures.
•Safety isolation expertise: ASIL-B to ASIL-D structural partitioning, secure boot chains, and hardware
security module (HSM) hooks.
Preferred Skills
•Experience architecting hypervisor-based consolidation of safety-critical and infotainment domains
on a single SoC.
•Exposure to GPU, audio, or peripheral virtualization and shared-resource scheduling design.
•Familiarity with ISO 26262 functional safety processes applied to virtualization layers.
•Experience working directly with silicon vendors on BSP/hypervisor bring-up.
Education
•B.E. / B.Tech / M.Tech in Computer Science, Electronics, Electrical Engineering, or related discipline.
Project Experience
•Demonstrated ownership of QNX/hypervisor-based system architecture on at least one production or
pre-production vehicle program.
•Experience isolating safety-critical clusters from infotainment guest OS on a shared SoC.
Soft Skills
•Strong low-level systems architecture and safety-partitioning judgment.
•Technical leadership and mentoring ability.
•Clear documentation and communication with hardware, safety, and silicon teams.
Good to Have
•Direct experience with ASIL-D structural partitioning on production programs.
•Familiarity with secure boot chains and HSM-based key management.
•Experience with multiple guest OS combinations (Android, Linux, RTOS) under a single hypervisor.
Expected Deliverables
•QNX/Hypervisor system architecture and IPC design specification.
•Hardware passthrough, device virtualization, and scheduling design documentation.
•Freedom-from-interference and safety-partitioning compliance evidence.
Show more Show less