LT
SoC Integration Engineer
Accepting applicationsLeadSoc Technologies Pvt Ltd · Bengaluru, Karnataka, India
Full-Time Mid_senior ARMDFTJTAGPerlPython
Posted
2d ago
Category
Design
Experience
Mid_senior
Country
India
SoC Integration Engineer
Location: Bengaluru
Experience: 8+ Years
Role Overview
We are looking for an experienced SoC Integration Engineer with strong expertise in SoC bring-up, system-level verification, debug, and integration. The ideal candidate will work across hardware, firmware, and system teams to validate complex SoC platforms, including multi-die systems, and drive verification from integration through signoff.
Key Responsibilities
Own SoC-level verification and integration across reset, clock, power, boot, and debug flows.
Drive SoC bring-up, including reset sequencing, clock initialization, power-domain behavior, boot flows, and system debug.
Develop and execute SystemVerilog/UVM-based SoC verification environments and test scenarios.
Validate CoreSight, JTAG, Scan/DFT and system debug infrastructure.
Drive multi-die validation, including die-to-die interfaces, initialization, connectivity, and system-level scenarios.
Develop firmware-assisted verification and debug system-level hardware/firmware interactions.
Verify AMBA-based SoC interconnects and peripherals, including AXI, AHB, and APB.
Debug complex integration issues across RTL, firmware, clocks, resets, power domains, and interfaces.
Develop directed, constrained-random, stress, and negative test scenarios for SoC-level validation.
Collaborate closely with RTL, Architecture, Firmware, DFT, Physical Design, and System Validation teams.
Drive verification planning, regression, coverage analysis, debug, and signoff.
Support and drive ARM SystemReady compliance activities and related system-level validation.
Must-Have Expertise
8+ years of hands-on experience in SoC Design Verification / Integration.
Strong experience in SoC bring-up and system-level debug.
Deep understanding of reset, clock, power-domain, and boot flows.
Hands-on experience with ARM CoreSight and JTAG/Scan infrastructure.
Experience with multi-die / chiplet-based system validation.
Strong SystemVerilog / UVM expertise.
Experience with firmware-assisted verification and hardware/firmware co-debug.
Strong knowledge of AMBA protocols, particularly AXI/AHB/APB.
Experience with ARM SystemReady Compliance.
Strong debugging, problem-solving, and cross-functional collaboration skills.
Good to Have
Experience with complex ARM-based SoCs and heterogeneous systems.
Exposure to chiplet architecture and die-to-die protocols.
Experience with low-power SoC architectures and power-management flows.
Knowledge of SVA, functional coverage, formal verification, and emulation.
Experience with industry-standard simulation and debug tools.
Strong scripting skills in Python, Tcl, or Perl.
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Location: Bengaluru
Experience: 8+ Years
Role Overview
We are looking for an experienced SoC Integration Engineer with strong expertise in SoC bring-up, system-level verification, debug, and integration. The ideal candidate will work across hardware, firmware, and system teams to validate complex SoC platforms, including multi-die systems, and drive verification from integration through signoff.
Key Responsibilities
Own SoC-level verification and integration across reset, clock, power, boot, and debug flows.
Drive SoC bring-up, including reset sequencing, clock initialization, power-domain behavior, boot flows, and system debug.
Develop and execute SystemVerilog/UVM-based SoC verification environments and test scenarios.
Validate CoreSight, JTAG, Scan/DFT and system debug infrastructure.
Drive multi-die validation, including die-to-die interfaces, initialization, connectivity, and system-level scenarios.
Develop firmware-assisted verification and debug system-level hardware/firmware interactions.
Verify AMBA-based SoC interconnects and peripherals, including AXI, AHB, and APB.
Debug complex integration issues across RTL, firmware, clocks, resets, power domains, and interfaces.
Develop directed, constrained-random, stress, and negative test scenarios for SoC-level validation.
Collaborate closely with RTL, Architecture, Firmware, DFT, Physical Design, and System Validation teams.
Drive verification planning, regression, coverage analysis, debug, and signoff.
Support and drive ARM SystemReady compliance activities and related system-level validation.
Must-Have Expertise
8+ years of hands-on experience in SoC Design Verification / Integration.
Strong experience in SoC bring-up and system-level debug.
Deep understanding of reset, clock, power-domain, and boot flows.
Hands-on experience with ARM CoreSight and JTAG/Scan infrastructure.
Experience with multi-die / chiplet-based system validation.
Strong SystemVerilog / UVM expertise.
Experience with firmware-assisted verification and hardware/firmware co-debug.
Strong knowledge of AMBA protocols, particularly AXI/AHB/APB.
Experience with ARM SystemReady Compliance.
Strong debugging, problem-solving, and cross-functional collaboration skills.
Good to Have
Experience with complex ARM-based SoCs and heterogeneous systems.
Exposure to chiplet architecture and die-to-die protocols.
Experience with low-power SoC architectures and power-management flows.
Knowledge of SVA, functional coverage, formal verification, and emulation.
Experience with industry-standard simulation and debug tools.
Strong scripting skills in Python, Tcl, or Perl.
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