CC
Senior ASIC Integration Engineer
Accepting applicationsCorpGlobal Consulting · United States
Full-Time Mid_senior ASICSoC
Posted
3d ago
Category
Design
Experience
Mid_senior
Country
United States
Senior ASIC Integration Engineer | B2B/Contractor
Location: Remote (US business hours)
Contract Duration: 1-2 Years
Travel: USA, Europe and occasional Asia travel
Start Date: End of 2026
About the Opportunity
We are seeking an experienced Senior ASIC Integration Engineer to support the development of advanced semiconductor solutions for a global engineering organisation focused on electrification, energy efficiency, and next-generation electronic systems.
This position offers the opportunity to influence ASIC architecture, manufacturing strategy, cost optimisation, and supply chain resilience across the entire semiconductor development lifecycle.
The successful consultant will work closely with engineering teams, semiconductor foundries, OSAT partners, and third-party IP vendors to ensure delivery of robust, scalable, and commercially viable ASIC solutions.
Key Responsibilities
Define ASIC requirements and evaluate architecture trade-offs.
Develop specifications for complex ASIC and SoC solutions.
Represent engineering teams in technical discussions with foundries, OSATs, and IP providers.
Evaluate, select, and integrate third-party semiconductor IP.
Lead trade-off analysis involving performance, power, die size, yield, manufacturability, and unit cost.
Influence process and PDK selection.
Provide technical input into semiconductor cost models, including wafer economics, packaging costs, test costs, and yield considerations.
Support Design-for-Cost, Design-for-Manufacturing, Design-for-Assembly, and Design-for-Yield activities.
Partner with validation and test teams to develop efficient production test strategies.
Drive continuous optimisation through analysis of silicon data, manufacturing metrics, and production yields.
Contribute to supply chain resilience strategies and multi-sourcing initiatives.
Required Experience
8+ years of experience in ASIC microarchitecture, ASIC design, or SoC development.
Proven record of successful ASIC or SoC tape-outs.
Deep understanding of semiconductor architecture and microarchitecture.
Strong experience with semiconductor IP evaluation and integration.
Knowledge of foundry technologies, process nodes, and PDKs.
Experience with advanced packaging and assembly strategies.
Understanding of semiconductor test methodologies and production testing.
Strong knowledge of yield analysis and optimisation techniques.
Familiarity with wafer economics, OSAT operations, and semiconductor cost drivers.
Experience evaluating the impact of design decisions on performance, manufacturability, supply chain risk, and overall product cost.
Ability to balance technical and commercial considerations when making architectural decisions.
Travel Requirements
Frequent travel to Billund, Denmark (potentially several times per month).
Quarterly travel to Boston, Massachusetts.
Occasional travel across Europe and Asia
Candidate Eligibility
Applicants must be able to travel freely throughout Europe and the United States without requiring visa sponsorship. US citizens and citizens of countries participating in the US Visa Waiver Program are particularly encouraged to apply.
Interview Process
Technical & Introduction Interview (1 hour)
One to two customer interviews
Interested in joining a cutting-edge semiconductor programme with global impact? Apply today or reach out to our team for more details
Show more Show less
Location: Remote (US business hours)
Contract Duration: 1-2 Years
Travel: USA, Europe and occasional Asia travel
Start Date: End of 2026
About the Opportunity
We are seeking an experienced Senior ASIC Integration Engineer to support the development of advanced semiconductor solutions for a global engineering organisation focused on electrification, energy efficiency, and next-generation electronic systems.
This position offers the opportunity to influence ASIC architecture, manufacturing strategy, cost optimisation, and supply chain resilience across the entire semiconductor development lifecycle.
The successful consultant will work closely with engineering teams, semiconductor foundries, OSAT partners, and third-party IP vendors to ensure delivery of robust, scalable, and commercially viable ASIC solutions.
Key Responsibilities
Define ASIC requirements and evaluate architecture trade-offs.
Develop specifications for complex ASIC and SoC solutions.
Represent engineering teams in technical discussions with foundries, OSATs, and IP providers.
Evaluate, select, and integrate third-party semiconductor IP.
Lead trade-off analysis involving performance, power, die size, yield, manufacturability, and unit cost.
Influence process and PDK selection.
Provide technical input into semiconductor cost models, including wafer economics, packaging costs, test costs, and yield considerations.
Support Design-for-Cost, Design-for-Manufacturing, Design-for-Assembly, and Design-for-Yield activities.
Partner with validation and test teams to develop efficient production test strategies.
Drive continuous optimisation through analysis of silicon data, manufacturing metrics, and production yields.
Contribute to supply chain resilience strategies and multi-sourcing initiatives.
Required Experience
8+ years of experience in ASIC microarchitecture, ASIC design, or SoC development.
Proven record of successful ASIC or SoC tape-outs.
Deep understanding of semiconductor architecture and microarchitecture.
Strong experience with semiconductor IP evaluation and integration.
Knowledge of foundry technologies, process nodes, and PDKs.
Experience with advanced packaging and assembly strategies.
Understanding of semiconductor test methodologies and production testing.
Strong knowledge of yield analysis and optimisation techniques.
Familiarity with wafer economics, OSAT operations, and semiconductor cost drivers.
Experience evaluating the impact of design decisions on performance, manufacturability, supply chain risk, and overall product cost.
Ability to balance technical and commercial considerations when making architectural decisions.
Travel Requirements
Frequent travel to Billund, Denmark (potentially several times per month).
Quarterly travel to Boston, Massachusetts.
Occasional travel across Europe and Asia
Candidate Eligibility
Applicants must be able to travel freely throughout Europe and the United States without requiring visa sponsorship. US citizens and citizens of countries participating in the US Visa Waiver Program are particularly encouraged to apply.
Interview Process
Technical & Introduction Interview (1 hour)
One to two customer interviews
Interested in joining a cutting-edge semiconductor programme with global impact? Apply today or reach out to our team for more details
Show more Show less