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Physical Design Engineer
Accepting applicationsVerex Engineering LLC · San Francisco, CA
Full-Time Entry CadenceMentorPerlPythonRTL
Posted
21h ago
Category
Design
Experience
Entry
Country
United States
Company Description Verex Engineering LLC is a multi-cloud solutions, engineering, and healthcare-focused company that helps organizations grow their business, increase efficiency, and prepare for the future. The team specializes in managing applications and infrastructure across leading cloud platforms such as AWS, Microsoft Azure, and Google Cloud in a cohesive, integrated way. By solving complex workload challenges and turning them into competitive advantages, Verex Engineering enables clients to work faster and smarter. Its comprehensive multi-cloud engineering services cover the full project lifecycle, from assessment and deployment to migration and ongoing management, with a strong emphasis on seamless integration, security, and compliance.
Role Description The Physical Design Engineer role is a full-time, on-site position based in San Francisco, CA. In this role, the engineer will perform end-to-end physical design tasks, including floorplanning, placement, clock tree synthesis, routing, and timing closure for complex integrated circuits. The engineer will collaborate closely with logic and RTL design teams to translate design intent into optimized physical implementations, and will run physical verification checks to ensure design rule compliance and manufacturability. Daily responsibilities include analyzing design trade-offs, debugging layout and timing issues, preparing documentation, and participating in design reviews to support high-quality, scalable multi-cloud and engineering solutions.
Qualifications
Candidates should possess strong skills in Physical Design, including floorplanning, placement, clock tree synthesis, routing, and timing closure.
Candidates should possess skills in Physical Verification, including DRC, LVS, ERC, and familiarity with sign-off tools and methodologies.
Candidates should possess skills in Logic Design and RTL Design, including understanding of digital design principles, RTL coding, and synthesis flows.
Candidates should possess skills in Circuit Design, including knowledge of digital and mixed-signal circuits, power, performance, and area optimization.
Experience with industry-standard EDA tools (e.g., Cadence, Synopsys, Mentor) and modern semiconductor process technologies.
Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related technical field.
Strong analytical, problem-solving, and communication skills, with the ability to collaborate effectively in cross-functional engineering teams.
Experience with scripting languages (such as Python, Perl, or Tcl) for design automation and flow optimization is beneficial.
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Role Description The Physical Design Engineer role is a full-time, on-site position based in San Francisco, CA. In this role, the engineer will perform end-to-end physical design tasks, including floorplanning, placement, clock tree synthesis, routing, and timing closure for complex integrated circuits. The engineer will collaborate closely with logic and RTL design teams to translate design intent into optimized physical implementations, and will run physical verification checks to ensure design rule compliance and manufacturability. Daily responsibilities include analyzing design trade-offs, debugging layout and timing issues, preparing documentation, and participating in design reviews to support high-quality, scalable multi-cloud and engineering solutions.
Qualifications
Candidates should possess strong skills in Physical Design, including floorplanning, placement, clock tree synthesis, routing, and timing closure.
Candidates should possess skills in Physical Verification, including DRC, LVS, ERC, and familiarity with sign-off tools and methodologies.
Candidates should possess skills in Logic Design and RTL Design, including understanding of digital design principles, RTL coding, and synthesis flows.
Candidates should possess skills in Circuit Design, including knowledge of digital and mixed-signal circuits, power, performance, and area optimization.
Experience with industry-standard EDA tools (e.g., Cadence, Synopsys, Mentor) and modern semiconductor process technologies.
Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related technical field.
Strong analytical, problem-solving, and communication skills, with the ability to collaborate effectively in cross-functional engineering teams.
Experience with scripting languages (such as Python, Perl, or Tcl) for design automation and flow optimization is beneficial.
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