CM
Physical Design CAD Engineer
Accepting applicationsCorp Match Private Limited · Greater Bengaluru Area
Full-Time Entry CadenceMentorPerlPythonRTL
Estimated market salary
₹17-29 LPA
This is a SiliconBoard market estimate, not an employer-posted salary.
Posted
20h ago
Category
Eda
Experience
Entry
Country
India
Company Description Corp Match Private Limited (Corpmatch) is a placement-focused training and hiring ecosystem committed to transforming students into industry-ready professionals. The company partners with colleges and employers across India to bridge the gap between academic learning and corporate expectations. Corpmatch delivers IT and non-IT skill development, financial domain training, corporate readiness, and industry-aligned certification programs designed for measurable placement outcomes. By working closely with institutions, companies, and students, Corpmatch builds sustainable talent pipelines and improves employability. Its mission is to reduce the skill gap and create meaningful, long-term career opportunities.
Role Description This is a full-time, on-site Physical Design CAD Engineer role based in the Greater Bengaluru Area. The Physical Design CAD Engineer will develop, maintain, and optimize CAD flows and tools supporting physical design, including floorplanning, placement, clock tree synthesis, routing, and sign-off. The role involves collaborating with design, verification, and physical implementation teams to integrate CAD solutions, debug tool and flow issues, and improve automation and productivity. The engineer will support physical verification flows (DRC/LVS), timing closure, and design-for-manufacturability checks, as well as contribute to methodology documentation and best practices. Daily responsibilities also include evaluating EDA tools, scripting for flow enhancements, and ensuring robust, scalable CAD environments for complex semiconductor designs.
Qualifications
Strong expertise in Physical Design, including floorplanning, placement, clock tree synthesis, routing, and timing closure.
Hands-on experience with Physical Verification flows such as DRC, LVS, and sign-off checks using industry-standard EDA tools.
Solid understanding of Logic Design and RTL Design concepts, including synthesis, constraints, and design-for-test considerations.
Knowledge of Circuit Design fundamentals, device behavior, and layout-impact on performance, power, and area.
Proficiency in scripting languages (e.g., Python, Tcl, Perl, or Shell) for CAD automation and flow development.
Familiarity with major EDA toolchains for physical implementation and verification (e.g., Synopsys, Cadence, Mentor/Siemens).
Bachelor’s or Master’s degree in Electronics, Electrical Engineering, VLSI, or a related field, or equivalent practical experience.
Strong analytical and problem-solving skills, attention to detail, and ability to collaborate effectively in cross-functional teams.
Experience with advanced process nodes and tape-out flows is a plus.
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Role Description This is a full-time, on-site Physical Design CAD Engineer role based in the Greater Bengaluru Area. The Physical Design CAD Engineer will develop, maintain, and optimize CAD flows and tools supporting physical design, including floorplanning, placement, clock tree synthesis, routing, and sign-off. The role involves collaborating with design, verification, and physical implementation teams to integrate CAD solutions, debug tool and flow issues, and improve automation and productivity. The engineer will support physical verification flows (DRC/LVS), timing closure, and design-for-manufacturability checks, as well as contribute to methodology documentation and best practices. Daily responsibilities also include evaluating EDA tools, scripting for flow enhancements, and ensuring robust, scalable CAD environments for complex semiconductor designs.
Qualifications
Strong expertise in Physical Design, including floorplanning, placement, clock tree synthesis, routing, and timing closure.
Hands-on experience with Physical Verification flows such as DRC, LVS, and sign-off checks using industry-standard EDA tools.
Solid understanding of Logic Design and RTL Design concepts, including synthesis, constraints, and design-for-test considerations.
Knowledge of Circuit Design fundamentals, device behavior, and layout-impact on performance, power, and area.
Proficiency in scripting languages (e.g., Python, Tcl, Perl, or Shell) for CAD automation and flow development.
Familiarity with major EDA toolchains for physical implementation and verification (e.g., Synopsys, Cadence, Mentor/Siemens).
Bachelor’s or Master’s degree in Electronics, Electrical Engineering, VLSI, or a related field, or equivalent practical experience.
Strong analytical and problem-solving skills, attention to detail, and ability to collaborate effectively in cross-functional teams.
Experience with advanced process nodes and tape-out flows is a plus.
Show more Show less