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Mixed Signal Verification Engineer_San Jose, CA (Onsite role only local candidate)
Accepting applicationsXoriant · San Jose, CA
Contract Mid_senior AnalogMixed SignalRFSerDesSoC
Posted
1d ago
Category
Design
Experience
Mid_senior
Country
United States
Title: Mixed Signal Verification Engineer
Location: San Jose, CA (only local candidates)
Duration: 6+ Months (Potential for Extension)
Interview Process: Zoom, Webex, and/or Onsite
Rate: $100- $150 /hr on W2 (No Benefits)
Job Overview
We are seeking a Mixed Signal Verification Engineer to support the development and verification of advanced wireless RF and high-speed interface technologies. The ideal candidate will have strong experience in mixed-signal verification, analog/digital simulation environments, and close collaboration with design teams to ensure successful silicon validation and product deployment.
Key Responsibilities
Develop and maintain AMS/DMS verification environments for wireless RF and high-speed PHY designs.
Collaborate with RF and Analog Design Engineers to create and validate behavioral models for analog circuits.
Execute mixed-signal verification activities and debug complex design issues.
Support silicon bring-up, validation, and product commercialization efforts.
Analyze simulation results and ensure design functionality meets product requirements.
Required Qualifications
Bachelor's Degree in Electrical Engineering, Electronics Engineering, or a related field.
3+ years of experience in mixed-signal or digital verification.
Strong understanding of digital VLSI design and simulation methodologies.
Solid knowledge of mixed-signal and analog simulation flows.
Hands-on experience with Verilog, SystemVerilog, and Real Number Modeling (RNM).
Experience with UVM-based verification, waveform analysis, and debugging tools.
Strong analytical, communication, and problem-solving skills.
Ability to work effectively in a collaborative team environment.
Preferred Qualifications
Knowledge of wireless RF transceiver architectures and high-speed SerDes PHY technologies.
Experience working on advanced mixed-signal SoC or communication system designs.
Familiarity with silicon validation and post-silicon debugging processes.
///*****Any query you can call on 408 550 1287*****///////////
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Location: San Jose, CA (only local candidates)
Duration: 6+ Months (Potential for Extension)
Interview Process: Zoom, Webex, and/or Onsite
Rate: $100- $150 /hr on W2 (No Benefits)
Job Overview
We are seeking a Mixed Signal Verification Engineer to support the development and verification of advanced wireless RF and high-speed interface technologies. The ideal candidate will have strong experience in mixed-signal verification, analog/digital simulation environments, and close collaboration with design teams to ensure successful silicon validation and product deployment.
Key Responsibilities
Develop and maintain AMS/DMS verification environments for wireless RF and high-speed PHY designs.
Collaborate with RF and Analog Design Engineers to create and validate behavioral models for analog circuits.
Execute mixed-signal verification activities and debug complex design issues.
Support silicon bring-up, validation, and product commercialization efforts.
Analyze simulation results and ensure design functionality meets product requirements.
Required Qualifications
Bachelor's Degree in Electrical Engineering, Electronics Engineering, or a related field.
3+ years of experience in mixed-signal or digital verification.
Strong understanding of digital VLSI design and simulation methodologies.
Solid knowledge of mixed-signal and analog simulation flows.
Hands-on experience with Verilog, SystemVerilog, and Real Number Modeling (RNM).
Experience with UVM-based verification, waveform analysis, and debugging tools.
Strong analytical, communication, and problem-solving skills.
Ability to work effectively in a collaborative team environment.
Preferred Qualifications
Knowledge of wireless RF transceiver architectures and high-speed SerDes PHY technologies.
Experience working on advanced mixed-signal SoC or communication system designs.
Familiarity with silicon validation and post-silicon debugging processes.
///*****Any query you can call on 408 550 1287*****///////////
Show more Show less