PR
Design Verification Engineer
Accepting applicationsPlatform Recruitment · Austin, Texas Metropolitan Area
Full-Time Mid_senior ASICC++FPGAPythonRTL
Posted
2d ago
Category
Verification
Experience
Mid_senior
Country
United States
We’re working with a top-tier, highly selective technology firm building ultra-low latency hardware systems that operate at the forefront of global electronic markets.
They’re looking for a verification engineer to join a small, deeply technical team responsible for validating complex FPGA and ASIC designs. This is an environment where verification isn’t constrained by legacy methodology; you’ll be encouraged to shape how it’s done.
The Role
The verification approach is flexible and evolving, combining open-source and in-house tooling rather than relying on rigid, traditional frameworks.
Engineers here are expected not just to verify designs, but to improve the flow and tooling.
Responsibilities
Develop testbenches and targeted tests for complex hardware designs using a flexible verification environment
Own verification strategy: planning, coverage, and ensuring robustness of designs
Debug RTL issues quickly and work closely with designers to resolve them
Build and improve verification infrastructure, including test frameworks and CI systems
Contribute to internal tooling and, where appropriate, open-source projects
Requirements
Strong debugging and problem-solving ability in complex hardware systems
2+ years’ experience in RTL functional verification (FPGA or ASIC)
Excellent Python experience beyond simple scripting.
Solid understanding of coverage, test strategy, and verification fundamentals
Comfortable working in Linux environments
Nice to have:
Familiarity with modern open-source verification tools (e.g. cocotb, Verilator)
Experience with C++ or performance-sensitive systems
What Sets This Role Apart
Tool-building culture – engineers actively develop and improve their own tooling, rather than relying on vendor ecosystems
Flexible project ownership – engineers have significant freedom to choose what they work on, from verification tooling and methodology through to deeper involvement in system architecture and even higher-level trading infrastructure
Real ownership – your work directly impacts production systems running in live environments
High technical bar – you’ll work alongside engineers who contribute to widely used verification tools and infrastructure
Collaborative by design – close interaction with hardware, software, and research teams
Package & Process
Compensation is at the very top of the market, reflecting both the technical bar and the impact of the work.
The interview process is rigorous and highly selective, but consistent with the level of engineering you’ll be joining.
Show more Show less
They’re looking for a verification engineer to join a small, deeply technical team responsible for validating complex FPGA and ASIC designs. This is an environment where verification isn’t constrained by legacy methodology; you’ll be encouraged to shape how it’s done.
The Role
The verification approach is flexible and evolving, combining open-source and in-house tooling rather than relying on rigid, traditional frameworks.
Engineers here are expected not just to verify designs, but to improve the flow and tooling.
Responsibilities
Develop testbenches and targeted tests for complex hardware designs using a flexible verification environment
Own verification strategy: planning, coverage, and ensuring robustness of designs
Debug RTL issues quickly and work closely with designers to resolve them
Build and improve verification infrastructure, including test frameworks and CI systems
Contribute to internal tooling and, where appropriate, open-source projects
Requirements
Strong debugging and problem-solving ability in complex hardware systems
2+ years’ experience in RTL functional verification (FPGA or ASIC)
Excellent Python experience beyond simple scripting.
Solid understanding of coverage, test strategy, and verification fundamentals
Comfortable working in Linux environments
Nice to have:
Familiarity with modern open-source verification tools (e.g. cocotb, Verilator)
Experience with C++ or performance-sensitive systems
What Sets This Role Apart
Tool-building culture – engineers actively develop and improve their own tooling, rather than relying on vendor ecosystems
Flexible project ownership – engineers have significant freedom to choose what they work on, from verification tooling and methodology through to deeper involvement in system architecture and even higher-level trading infrastructure
Real ownership – your work directly impacts production systems running in live environments
High technical bar – you’ll work alongside engineers who contribute to widely used verification tools and infrastructure
Collaborative by design – close interaction with hardware, software, and research teams
Package & Process
Compensation is at the very top of the market, reflecting both the technical bar and the impact of the work.
The interview process is rigorous and highly selective, but consistent with the level of engineering you’ll be joining.
Show more Show less