RC
Chip Implementation CAD Engineer (Digital Reference flow development)
Accepting applicationsRapidus Corporation US · Albany, New York Metropolitan Area
Full-Time Mid_senior AIFinFET
Posted
2d ago
Category
Eda
Experience
Mid_senior
Country
N/A
Job Title:
Chip Implementation CAD Engineer (Digital Reference flow development)
Team: Enablement
Location: Albany (NY)--preferred, Santa Clara (CA), or Tokyo (Japan)
Role Overview:
You will focus on the implementation stages (Synthesis and PnR) of the digital reference flow. Additionally, you will lead the adoption of next-generation automation tools, including AI/ML-driven DSE (Design space exploration)
Key Responsibilities:
・Develop and verify implementation steps (Synthesis/PnR) of the reference flow.
・Evaluate and productize AI/ML-driven Design Space Exploration (DSE) tools.
・Partner with EDA vendors to integrate the latest features and work with design contractors to streamline implementation methodologies.
・Author technical documentation and provide expert customer support.
Qualifications:
・Experience in logic synthesis and APR (Automatic Place and Route) flows.
・Experience with advanced process nodes (7nm FinFET and beyond) is preferred but not mandatory.
Benefits
Comprehensive Health, Dental and Vision coverage, fully at company's expense (no deductibles), 401k with no employer match
Show more Show less
Chip Implementation CAD Engineer (Digital Reference flow development)
Team: Enablement
Location: Albany (NY)--preferred, Santa Clara (CA), or Tokyo (Japan)
Role Overview:
You will focus on the implementation stages (Synthesis and PnR) of the digital reference flow. Additionally, you will lead the adoption of next-generation automation tools, including AI/ML-driven DSE (Design space exploration)
Key Responsibilities:
・Develop and verify implementation steps (Synthesis/PnR) of the reference flow.
・Evaluate and productize AI/ML-driven Design Space Exploration (DSE) tools.
・Partner with EDA vendors to integrate the latest features and work with design contractors to streamline implementation methodologies.
・Author technical documentation and provide expert customer support.
Qualifications:
・Experience in logic synthesis and APR (Automatic Place and Route) flows.
・Experience with advanced process nodes (7nm FinFET and beyond) is preferred but not mandatory.
Benefits
Comprehensive Health, Dental and Vision coverage, fully at company's expense (no deductibles), 401k with no employer match
Show more Show less