SS
CAD Engineer Digital Verification
Accepting applicationsSpanIdea Systems · San Jose, CA
Full-Time Entry AICadencePerlPythonSystemVerilog
Posted
1d ago
Category
Eda
Experience
Entry
Country
United States
Job Opportunity: Digital Verification CAD Engineer
Company: Spanidea
Location: San Jose, CA (On-site)
Experience: 8 – 15 Years
Role Type: Contract
Rate: $90/hr
Role Overview
Spanidea is seeking a seasoned Digital Verification CAD Engineer to revolutionize our verification workflows. This role sits at the intersection of traditional hardware verification and cutting-edge automation. You will be responsible for developing scalable CAD solutions, integrating AI/ML technologies to accelerate debug cycles, and eliminating bottlenecks in large-scale simulation environments.
Key Responsibilities
Workflow Optimization: Partner with verification teams to identify methodology gaps and implement high-performance CAD solutions.
AI/ML Integration: Deploy AI/ML and LLM-based technologies to enhance debug efficiency, productivity, and coverage closure.
Automation: Eliminate manual, repetitive tasks by developing automated scripts to improve usability and system performance.
Scalability: Identify and resolve bottlenecks in simulation and regression processes to ensure scalable improvements.
Technical Leadership: Enable the adoption of AI-powered capabilities and provide expert guidance and training on new tools and methodologies.
Technical Requirements
Education: Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
Verification Expertise: Deep knowledge of digital verification methodologies, including simulation, regression, and coverage analysis.
Frameworks: Hands-on experience with SystemVerilog and UVM.
Scripting: Mastery of Python, Perl, or Tcl for engineering automation.
AI/EDA Tools: Exposure to AI/ML frameworks and experience with EDA AI platforms (e.g., Cadence Verisium).
Preferred Qualifications
Experience building or maintaining large-scale CAD/EDA infrastructures.
Familiarity with data analytics, ML model integration, or LLM-based engineering tools.
Proficiency with version control (Git) and CI/CD methodologies.
Strong communication skills with a proven ability to influence methodology improvements across cross-functional teams.
Core Skills
CAD | Python | EDA | LLM | UVM
Status: Active | Openings: 1
Qualified candidates are encouraged to apply immediately for this ASAP start.
Show more Show less
Company: Spanidea
Location: San Jose, CA (On-site)
Experience: 8 – 15 Years
Role Type: Contract
Rate: $90/hr
Role Overview
Spanidea is seeking a seasoned Digital Verification CAD Engineer to revolutionize our verification workflows. This role sits at the intersection of traditional hardware verification and cutting-edge automation. You will be responsible for developing scalable CAD solutions, integrating AI/ML technologies to accelerate debug cycles, and eliminating bottlenecks in large-scale simulation environments.
Key Responsibilities
Workflow Optimization: Partner with verification teams to identify methodology gaps and implement high-performance CAD solutions.
AI/ML Integration: Deploy AI/ML and LLM-based technologies to enhance debug efficiency, productivity, and coverage closure.
Automation: Eliminate manual, repetitive tasks by developing automated scripts to improve usability and system performance.
Scalability: Identify and resolve bottlenecks in simulation and regression processes to ensure scalable improvements.
Technical Leadership: Enable the adoption of AI-powered capabilities and provide expert guidance and training on new tools and methodologies.
Technical Requirements
Education: Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
Verification Expertise: Deep knowledge of digital verification methodologies, including simulation, regression, and coverage analysis.
Frameworks: Hands-on experience with SystemVerilog and UVM.
Scripting: Mastery of Python, Perl, or Tcl for engineering automation.
AI/EDA Tools: Exposure to AI/ML frameworks and experience with EDA AI platforms (e.g., Cadence Verisium).
Preferred Qualifications
Experience building or maintaining large-scale CAD/EDA infrastructures.
Familiarity with data analytics, ML model integration, or LLM-based engineering tools.
Proficiency with version control (Git) and CI/CD methodologies.
Strong communication skills with a proven ability to influence methodology improvements across cross-functional teams.
Core Skills
CAD | Python | EDA | LLM | UVM
Status: Active | Openings: 1
Qualified candidates are encouraged to apply immediately for this ASAP start.
Show more Show less
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