TN
Analog IC Designer
Accepting applicationsTechnical-Link N. America · Agoura Hills, CA
Contract Mid_senior ASICATEAnalogCMOSCadence
Posted
2d ago
Category
Design
Experience
Mid_senior
Country
United States
We are looking for an enthusiastic candidate for the position of Senior Analog Design Engineer, to design low high-speed circuits in mixed-signal ICs for ATE (Automatic Test Equipment) instruments. We are looking for a candidate with experience in FINFET, general CMOS, and BCD technologies. Responsibilities include:Develop detailed circuit specifications for mixed signal circuitsConceive circuit architectures and transistor level circuit topologies that satisfy required performancePhysical implementation (layout) of high speed circuits, either directly or assisting.Optimization of circuits via simulation (with Cadence EDA tools) over all process and operating conditionsIntegration of circuit elements into large analog/mixed signals ASICsParticipation in the characterization of ASIC circuits.All About You We seek individuals who share our passion and determination. Our commitment to customer success drives us to go the extra mile. If you’re ready to join us in this mission, take a closer look at the minimum criteria for the position. MSEE with 5 years of experience or PhD in electrical engineering with 3 years experience in the design and characterization of multiple, high frequency and high scale of integration mixed signal integrated circuitsThorough knowledge of high frequency, broad-band Analog Mixed-Signal IC design – both electrical and physical designDesire experience in design of VCOs, PLLs, DLLs, ADCs, DACs, clock and data recovery, broadband amplifiers, bias generators, clock distribution networks, high frequency I/Os, high frequency CML designs, high voltage, power circuitsSolid understanding of CMOS semiconductor device physics and device modelingSolid understanding of electromagnetic theorySolid understanding of transmission line theorySolid understanding of thermal effects of various circuit topologies and different package typesInvolvement in all phases of multiple IC developments from specification to product introductionExperience with Cadence Skill or Ocean scripting for automating test benches is a plus.Proficiency in Verilog or Verilog-A modeling is highly desired.Direct experience in FINFET desiredGeneric experience in deep sub-micron CMOS (nodes Experience in BCD technology is a plusExperience with high voltage and/or mixed voltage domain circuit design is desiredSolid understanding and experience with IC characterization at high frequencies using high speed sampling oscilloscopes, spectrum analyzers, VNAs, signal sourcesSolid understanding of working with PDKsExperience with ATE test development is a plusAbility to work well with a teamGood communicator
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