Yochana
6 open semiconductor roles on SiliconBoard
Open positions at Yochana
IC Packaging Design Engineer
Fremont, CA
Contract Mid-senior Manufacturing
Lead ASIC DFT Engineer
California, United States
Contract Mid-senior Test
ASIC Design Verification Engineer (must be aligned with PST time zone)
California, United States
Full-Time Mid-senior Design
Design Verification Engineer
United States
Contract Mid-senior Design
Lead ASIC DFT Engineer
Nevada, United States
Contract Mid-senior Test
Firmware Engineer
Plano, TX
Full-Time Mid-senior Test