TS
Yield Engineer
Accepting applicationsTower Semiconductor · Newport Beach, CA
Full-Time Mid_senior CMPEtchanalog
Posted
15 Jun
Category
Manufacturing
Experience
Mid_senior
Country
United States
About Tower Semiconductor
Looking for a career path in the high-tech industry? Become part of a team focused on delivering the most exciting semiconductor technology in the world! If you enjoy working with others in a dynamic, fast-paced environment and are looking for an opportunity to grow your career in this exciting industry, then Tower Semiconductor is the place to be!
Tower Semiconductor, the leading foundry of high-value analog semiconductor solutions, provides technology, development, and process platforms for analog integrated circuits to more than 300 customers worldwide across growing markets such as communications, mobile, infrastructure, consumer, industrial, automotive, medical, and aerospace and defense, among others.
Join Tower and become part of a dynamic organization with exceptionally talented and dedicated team members who work collaboratively to provide best-in-class technological solutions to our clients.
Job Description
You will be responsible for sustaining all released semiconductor-related processing and major areas of responsibilities include monitoring in-line defectivity levels, resolving in-line yield issues, creating inspection recipes on defect-inspection tools and providing feedback to other process engineers and management to improve the manufacturing process. You will partner with Integration, Process, Equipment and R&D to meet performance, quality and cycle-time requirements. You will also work with our global team to trouble-shoot, benchmark and improve our processes.
This Job Is for You If
You have strong technical background to develop and sustain 0.35 to 0.13um RFCMOS/SiGe BiCMOS processes in Defectivity Monitoring, and one or more of Photolithography, Etch, Diffusion, Thin-films, CMP/Hivac, Copper Damascene and Wet-cleans
You have experience in sustaining in-line defectivity monitoring tools such as KLA/AMAT defectivity monitoring tools and optical/SEM microscopes
You are an expert in investigating, identifying, verifying, and containing sources of particulate contamination in semiconductor manufacturing
You have experience in analyzing defect-trend data, dispositioning problem wafers/lots, correlating defectivity type/level to product yield, using statistical process control techniques to improve yields, and providing corrective action recommendations to solve defectivity issue
You have the ability to work, and interface with Process Technicians to verify response to daily issues and assist with priority and held lots
You have led major and minor projects involving particulate contamination and fab yield issues by working closely with device, integration, process, and other yield engineers
You have designed and overseen experiments to enhance functional and fab yield through defect reduction
You have experience in performing analysis of in-line defectivity, E-Test, and Probe data to analyze data from experiments or in-line data to identify and resolve problems
You have strong understanding and experience in direct application of statistical process control
You have experience utilizing advanced analytical tools/software and techniques to solve wafer fabrication problems
You have experience in researching, analyzing and recommending capital equipment requirements for analytical tool purchases
You are able to work with other teams and QA to deliver results to customers’ requirements
Job Requirements
Minimum requirement is a bachelor’s degree in Materials Science, Chemistry, Electrical Engineering, Microelectronic Engineering, or Solid-State Physics - Master degree is preferred, New Grads with BSEE encouraged to apply
Minimum 3-5 years yield/process engineering experience
Experience in Copper CMP is a plus
Demonstrated knowledge of principles, theories, concepts, and techniques of process engineering
Ability to execute definable portions of a project or lead own small projects
Ability to use knowledge to provide solutions to a variety of difficult problems
Strong organizational skills; demonstrated ability to manage multiple tasks simultaneously and able to react to shifting priorities to meet business needs
Demonstrated ability to work well within a global team or environment
Six-Sigma certification is preferred
Strong knowledge in using Yield Analysis software
Strong knowledge in in-line automatic defect inspection tool (application, recipe setup, troubling shooting skill)
Sustained ownership of day-to-day operations and mentoring technicians
Compensation: Level 2 - Sr $100,000 - $122,000
#IND100
Show more Show less
Looking for a career path in the high-tech industry? Become part of a team focused on delivering the most exciting semiconductor technology in the world! If you enjoy working with others in a dynamic, fast-paced environment and are looking for an opportunity to grow your career in this exciting industry, then Tower Semiconductor is the place to be!
Tower Semiconductor, the leading foundry of high-value analog semiconductor solutions, provides technology, development, and process platforms for analog integrated circuits to more than 300 customers worldwide across growing markets such as communications, mobile, infrastructure, consumer, industrial, automotive, medical, and aerospace and defense, among others.
Join Tower and become part of a dynamic organization with exceptionally talented and dedicated team members who work collaboratively to provide best-in-class technological solutions to our clients.
Job Description
You will be responsible for sustaining all released semiconductor-related processing and major areas of responsibilities include monitoring in-line defectivity levels, resolving in-line yield issues, creating inspection recipes on defect-inspection tools and providing feedback to other process engineers and management to improve the manufacturing process. You will partner with Integration, Process, Equipment and R&D to meet performance, quality and cycle-time requirements. You will also work with our global team to trouble-shoot, benchmark and improve our processes.
This Job Is for You If
You have strong technical background to develop and sustain 0.35 to 0.13um RFCMOS/SiGe BiCMOS processes in Defectivity Monitoring, and one or more of Photolithography, Etch, Diffusion, Thin-films, CMP/Hivac, Copper Damascene and Wet-cleans
You have experience in sustaining in-line defectivity monitoring tools such as KLA/AMAT defectivity monitoring tools and optical/SEM microscopes
You are an expert in investigating, identifying, verifying, and containing sources of particulate contamination in semiconductor manufacturing
You have experience in analyzing defect-trend data, dispositioning problem wafers/lots, correlating defectivity type/level to product yield, using statistical process control techniques to improve yields, and providing corrective action recommendations to solve defectivity issue
You have the ability to work, and interface with Process Technicians to verify response to daily issues and assist with priority and held lots
You have led major and minor projects involving particulate contamination and fab yield issues by working closely with device, integration, process, and other yield engineers
You have designed and overseen experiments to enhance functional and fab yield through defect reduction
You have experience in performing analysis of in-line defectivity, E-Test, and Probe data to analyze data from experiments or in-line data to identify and resolve problems
You have strong understanding and experience in direct application of statistical process control
You have experience utilizing advanced analytical tools/software and techniques to solve wafer fabrication problems
You have experience in researching, analyzing and recommending capital equipment requirements for analytical tool purchases
You are able to work with other teams and QA to deliver results to customers’ requirements
Job Requirements
Minimum requirement is a bachelor’s degree in Materials Science, Chemistry, Electrical Engineering, Microelectronic Engineering, or Solid-State Physics - Master degree is preferred, New Grads with BSEE encouraged to apply
Minimum 3-5 years yield/process engineering experience
Experience in Copper CMP is a plus
Demonstrated knowledge of principles, theories, concepts, and techniques of process engineering
Ability to execute definable portions of a project or lead own small projects
Ability to use knowledge to provide solutions to a variety of difficult problems
Strong organizational skills; demonstrated ability to manage multiple tasks simultaneously and able to react to shifting priorities to meet business needs
Demonstrated ability to work well within a global team or environment
Six-Sigma certification is preferred
Strong knowledge in using Yield Analysis software
Strong knowledge in in-line automatic defect inspection tool (application, recipe setup, troubling shooting skill)
Sustained ownership of day-to-day operations and mentoring technicians
Compensation: Level 2 - Sr $100,000 - $122,000
#IND100
Show more Show less
Similar Jobs
M
Senior/Engineer, NAND Wafer Level Reliability & Design
Micron · Singapore, Singapore, Asia
ST
Mechanical Design Engineer (T)
SANMINA-SCI TECHNOLOGY INDIA PRIVATE LIMITED · Huntsville, AL
AD
Engineer, Semi Packaging Engineering
Analog Devices · Wilmington, MA
I
Developer
IsoTalent · Salt Lake City Metropolitan Area