Verification Engineer

Job Description

Job Title: Verification Engineer

Position Description: Protingent Staffing has an exciting direct hire Verification Engineer with our client located in Englewood, CO.

Job Description:

We are looking for a talented Design Verification Engineer.


Job Responsibilities:

Plan & implement UVM verification environments developing tests, testbenches, UVM components, and regressions/test lists
Responsible for generating and executing the Verification Test Plan and Verification Requirement Matrix
Interact with Architecture, Design, SW and Validation teams
Define new DV methodologies and improve existing ones
Work on both ASIC and FPGA Space system projects


Job Qualifications:

7+ years of relevant design verification experience
Proficiency in FPGA/ASIC Verification development methodology
Proficiency in System Verilog and UVM
Knowledge and experience with FPGA tools (Vivado/Quartus/VCS).


Preferred Job Qualifications:

Experience validating complex SOC designs
Experience validating RF Comms, DSP Algorithms, and High Speed SERDES
RTL Design experience
Experience validating designs for Space Applications


Job Details:

Job Type: Direct Hire
Salary Range: $130K-$200K.
Location: Englewood, CO.
ITAR obligations are associated with this role, U.S. citizenship, U.S. legal permanent resident status, or protected person status under 8 U.S.C.
1324b(a) (1), (3) is required


About Protingent: Protingent is an Award-Winning provider of top-tier Engineering and IT talent, trusted by companies at the forefront of innovation — from Software and Aerospace to AI, Clean Tech, Medical Devices, and Connected Technologies. We’re passionate about making a positive impact by connecting exceptional talent with meaningful opportunities and helping our clients build the future.
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