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Truechip - DFT Engineer - ATPG & MBIST Implementation
Accepting applicationsTruechip · Hyderabad, Telangana, India
Full-Time Associate ATPGMBISTScanDFTSynopsys DFT Compiler
Posted
2d ago
Category
Test
Experience
Associate
Country
India
Company Overview
Truechip is a leading provider of Verification IP (VIP) solutions, specializing in the development of high-quality, silicon-proven IP for complex SoC designs.
Operating at the forefront of the semiconductor industry, the company supports global clients in the automotive, mobile, networking, and storage sectors.
Truechip is recognized for its technical depth and commitment to accelerating the time-to-market for next-generation chip architectures through robust verification methodologies and engineering excellence.
Role Overview
As a DFT Engineer at Truechip, you will be responsible for architecting and implementing comprehensive Design-for-Test strategies to ensure the highest levels of silicon quality.
Key Responsibilities
Develop and execute robust DFT architectures, including scan insertion and test point insertion, to achieve high fault coverage for complex SoC designs.
Generate and validate ATPG patterns to ensure effective defect detection during wafer sort and final package testing.
Implement and verify MBIST architectures for embedded memories to ensure reliable memory testing and repair mechanisms.
Collaborate with cross-functional teams to resolve timing and congestion issues arising from DFT logic insertion.
Perform gate-level simulations and timing analysis to verify the integrity of test modes and ensure seamless integration with the overall design flow.
Drive the post-silicon debug process by analyzing test failures and providing actionable insights to improve yield and design robustness.
Required Skillset
Demonstrated expertise in industry-standard DFT methodologies, including scan insertion, ATPG, and MBIST implementation.
Strong proficiency in working with EDA tools from major vendors to manage the end-to-end DFT flow.
Ability to communicate complex technical challenges clearly to stakeholders and collaborate effectively within a distributed engineering team.
Proven capability to adapt to fast-paced project environments across Bangalore, Noida, and Hyderabad locations.
Strong analytical mindset with a focus on problem-solving and attention to detail in high-stakes silicon design environments.
A Bachelors or Masters degree in Electronics or Electrical Engineering, backed by 2 to 15 years of hands-on experience in the semiconductor domain.
(ref:hirist.tech)
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Truechip is a leading provider of Verification IP (VIP) solutions, specializing in the development of high-quality, silicon-proven IP for complex SoC designs.
Operating at the forefront of the semiconductor industry, the company supports global clients in the automotive, mobile, networking, and storage sectors.
Truechip is recognized for its technical depth and commitment to accelerating the time-to-market for next-generation chip architectures through robust verification methodologies and engineering excellence.
Role Overview
As a DFT Engineer at Truechip, you will be responsible for architecting and implementing comprehensive Design-for-Test strategies to ensure the highest levels of silicon quality.
Key Responsibilities
Develop and execute robust DFT architectures, including scan insertion and test point insertion, to achieve high fault coverage for complex SoC designs.
Generate and validate ATPG patterns to ensure effective defect detection during wafer sort and final package testing.
Implement and verify MBIST architectures for embedded memories to ensure reliable memory testing and repair mechanisms.
Collaborate with cross-functional teams to resolve timing and congestion issues arising from DFT logic insertion.
Perform gate-level simulations and timing analysis to verify the integrity of test modes and ensure seamless integration with the overall design flow.
Drive the post-silicon debug process by analyzing test failures and providing actionable insights to improve yield and design robustness.
Required Skillset
Demonstrated expertise in industry-standard DFT methodologies, including scan insertion, ATPG, and MBIST implementation.
Strong proficiency in working with EDA tools from major vendors to manage the end-to-end DFT flow.
Ability to communicate complex technical challenges clearly to stakeholders and collaborate effectively within a distributed engineering team.
Proven capability to adapt to fast-paced project environments across Bangalore, Noida, and Hyderabad locations.
Strong analytical mindset with a focus on problem-solving and attention to detail in high-stakes silicon design environments.
A Bachelors or Masters degree in Electronics or Electrical Engineering, backed by 2 to 15 years of hands-on experience in the semiconductor domain.
(ref:hirist.tech)
Show more Show less