RE

System Engineer

Accepting applications

Renesas Electronics · Austin, Texas Metropolitan Area

Full-Time Associate MATLABPythonRTLSystemVerilogUVM
Posted
6d ago
Category
Design
Experience
Associate
Country
United States
What you’ll do
Architect and optimize digital multiphase voltage regulators.
Perform gain/phase margin and stability analysis; architect and design robust loop compensation.
Model and simulate regulator behavior (steady‑state & transients) in Simplis/MATLAB/Simulink/SystemVerilog.
Define PWM modulation, phase‑management, current sensing, and ripple minimization strategies.
Model/Implement/verify control logic with SystemVerilog/Verilog; collaborate across analog, digital, and mixed‑signal teams.
Validate designs via small‑signal and time‑domain analysis; drive improvements to feedback systems.
What you’ll bring
Deep understanding of feedback control, Bode/Nyquist, and stability criteria.
Strong DSP fundamentals applied to digital power control.
Proven modeling skills: behavioral, small‑signal, and system‑level.
Hands‑on with multiphase converters, PWM schemes, current‑balance, and transient optimization.
SystemVerilog/Verilog proficiency for RTL design and verification (UVM a plus).
Scripting in MATLAB/Python preferred.
Qualifications
B.S./M.S. in Electrical Engineering (Ph.D. a plus).
5–10+ years in power electronics, control systems, or digital multiphase regulation.
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