Subsystem Verification Engineer (DV) | 5-8 Years | Bangalore | Immediate to 30 Days preferred

🚨 Hiring: Subsystem Verification Engineer (DV) 🚨
We are looking for an experienced Subsystem Verification Engineer to join our team in Bangalore.
🔹 Experience: 5–8 Years
🔹 Location: Bangalore
🔹 Notice Period: Immediate to 30 Days preferred
🔑 Key Responsibilities:
• Perform subsystem-level verification and integration of third-party IPs
• Integrate IPs and develop robust verification environments
• Create and execute verification/test plans
• Debug functional issues and identify root causes
• Validate subsystem-level functionality and ensure quality deliverables
🛠️ Required Skills:
• SystemVerilog (SV)
• UVM
• Subsystem Verification
• IP Integration
• Debugging
• AXI Protocol
⭐ Good to Have: Experience with Multimedia IP / Compression
📩 Interested candidates can share their updated profiles.
#Hiring #SubsystemVerification #DesignVerification #DV #VerificationEngineer #SystemVerilog #UVM #IPIntegration #AXI #SemiconductorJobs #BangaloreJobs #ChipDesign #VLSIJobs
Show more Show less