C
Staff Silicon Engineer
Accepting applicationsCognichip · Redwood City, CA
Full-Time Principal AIC++PythonSoCSystemVerilog
Posted
3 May
Category
Design
Experience
Principal
Country
United States
Job Title
Staff Silicon Engineer
Job Description
At Cognichip, we are building the next generation, enterprise product suite to empower semiconductor design engineers to achieve a 10x productivity boost with proprietary AI/ML models and modern cloud technologies. We are seeking an experienced logic design or verification engineer to join a growing Silicon AI team to develop AI-driven capabilities for silicon design and verification workflows and synthetic data engineering. You will join a team responsible for creating an AI engine capable of exhaustively designing and verifying the architecture and microarchitecture of various hardware IPs, as well as its integration into the larger SoC. We are looking for highly talented, passionate, and versatile engineers that can push hardware to highest performance and quality standards.
Core Responsibilities
Technical ownership of logic design and validation of various functional blocks of the CPU, IPs, and/or SoC
Documenting micro-architecture spec and testplans.
Driving reviews of AI generated spec and testplan documentation
Logic design of in-house hardware IPs including logic synthesis, timing closure, power optimization, area reduction, and meeting performance target
Develop validation content like UVM and SystemVerilog test benches, directed and constrained random tests, SystemVerilog assertions, and functional coverage
Applying agentic workflow to generate synthetic data for logic design and verification
Required Qualifications
MS in EE or related technical field
10+ years of experience in CPU+Graphic/SoC design and validation
Knowledge of CPU, IP and SoC architecture
Knowledge of logic design, synthesis, timing closure, low power design, multiple clock domains, area reduction
Knowledge of high-level verification flow methodology (testplan development, test generation and debug, assertion based verification, coverage analysis and closure)
Experience with emulation and gate level verification is a plus
Experience with backend flow and physical design is a plus
Experience with SystemVerilog and UVM
Experience with C/C++ and assembly
Experience with Python or other scripting languages
Ability to clearly communicate across teams with multidisciplinary backgrounds
Business fluent English
What We Offer
Work on foundational and unsolved problems at the frontier of AI and hardware
Real ownership in your work that directly shapes core product capabilities.
Work with a team of high-caliber collaborators at the intersection of AI, cloud, and semiconductor design.
A culture of innovation, precision, and impact, where your work directly shapes the future of engineering.
Competitive compensation package, including equity participation.
Show more Show less
Staff Silicon Engineer
Job Description
At Cognichip, we are building the next generation, enterprise product suite to empower semiconductor design engineers to achieve a 10x productivity boost with proprietary AI/ML models and modern cloud technologies. We are seeking an experienced logic design or verification engineer to join a growing Silicon AI team to develop AI-driven capabilities for silicon design and verification workflows and synthetic data engineering. You will join a team responsible for creating an AI engine capable of exhaustively designing and verifying the architecture and microarchitecture of various hardware IPs, as well as its integration into the larger SoC. We are looking for highly talented, passionate, and versatile engineers that can push hardware to highest performance and quality standards.
Core Responsibilities
Technical ownership of logic design and validation of various functional blocks of the CPU, IPs, and/or SoC
Documenting micro-architecture spec and testplans.
Driving reviews of AI generated spec and testplan documentation
Logic design of in-house hardware IPs including logic synthesis, timing closure, power optimization, area reduction, and meeting performance target
Develop validation content like UVM and SystemVerilog test benches, directed and constrained random tests, SystemVerilog assertions, and functional coverage
Applying agentic workflow to generate synthetic data for logic design and verification
Required Qualifications
MS in EE or related technical field
10+ years of experience in CPU+Graphic/SoC design and validation
Knowledge of CPU, IP and SoC architecture
Knowledge of logic design, synthesis, timing closure, low power design, multiple clock domains, area reduction
Knowledge of high-level verification flow methodology (testplan development, test generation and debug, assertion based verification, coverage analysis and closure)
Experience with emulation and gate level verification is a plus
Experience with backend flow and physical design is a plus
Experience with SystemVerilog and UVM
Experience with C/C++ and assembly
Experience with Python or other scripting languages
Ability to clearly communicate across teams with multidisciplinary backgrounds
Business fluent English
What We Offer
Work on foundational and unsolved problems at the frontier of AI and hardware
Real ownership in your work that directly shapes core product capabilities.
Work with a team of high-caliber collaborators at the intersection of AI, cloud, and semiconductor design.
A culture of innovation, precision, and impact, where your work directly shapes the future of engineering.
Competitive compensation package, including equity participation.
Show more Show less