Staff GPU Physical Design Engineer

About the Company


Job Details:


About the Role


Skills And Qualifications


Responsibilities


11+ years of experience with a Bachelor’s Degree in Computer Science/Engineering, or 9+ years of experience with a Master’s Degree, or 7+ years of experience with a Ph.D.
7+ years of hands-on experience with ASIC design flows and electrical engineering fundamentals.
Strong experience with POCV, derating methodologies, and timing analysis.
Strong hands-on experience with industry-standard STA tools (e.g. PrimeTime, Tempus), clock tree synthesis (CTS), multi-voltage and multi-clock designs.
Strong knowledge of formal equivalency checks, low-power checks, timing constraints, UPF.
Strong scripting/programming skills in Tcl, Perl, Shell, and/or Python.
Strong analytical skills, attention to detail, and problem-solving skills using data-driven approach.
Experience with leading technical initiatives, driving process and methodology innovation, and mentoring engineers.
Excellent collaboration and communication skills, with the ability to navigate ambiguity and influence stakeholders in a fast-paced, global team environment.


Qualifications


Nice to have: Familiarity with advanced FinFET process nodes (5nm or smaller).
Hands-on experience with synthesis, block and/or full chip implementation with the latest industry P&R/STA flows and tools.
Sign-off experience with reliability, signal integrity, noise, timing, power.


Required Skills


Strong experience with POCV, derating methodologies, and timing analysis.
Strong hands-on experience with industry-standard STA tools (e.g. PrimeTime, Tempus), clock tree synthesis (CTS), multi-voltage and multi-clock designs.
Strong knowledge of formal equivalency checks, low-power checks, timing constraints, UPF.
Strong scripting/programming skills in Tcl, Perl, Shell, and/or Python.
Strong analytical skills, attention to detail, and problem-solving skills using data-driven approach.
Excellent collaboration and communication skills, with the ability to navigate ambiguity and influence stakeholders in a fast-paced, global team environment.


Preferred Skills


Familiarity with advanced FinFET process nodes (5nm or smaller).
Hands-on experience with synthesis, block and/or full chip implementation with the latest industry P&R/STA flows and tools.
Sign-off experience with reliability, signal integrity, noise, timing, power.


Pay range and compensation package


[Pay range or salary or compensation]


Equal Opportunity Statement


[Include a statement on commitment to diversity and inclusivity.]

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