MT
STA Engineer
Accepting applicationsMirafra Technologies · Austin, TX
Full-Time Mid_senior ASICPerlPythonTcl
Posted
16 Jun
Category
Design
Experience
Mid_senior
Country
United States
6+ years of experience with a Bachelor’s Degree in Computer Science/Engineering, or 4+ years of experience with a Master’s Degree, or 2+ years of experience with a Ph.D.
Solid understanding and hands-on experience with ASIC design flows and electrical engineering fundamentals.
Working knowledge and experience with POCV, derating methodologies, and timing analysis.
Strong hands-on experience with industry-standard STA tools (e.g. PrimeTime, Tempus).
Solid hands-on experience with clock tree synthesis (CTS), multi-voltage and multi-clock designs.
Working knowledge of formal equivalency checks, low-power checks, timing constraints, UPF.
Strong scripting /programming skills in Tcl, Perl, Shell, and/or Python.
Show more Show less
Solid understanding and hands-on experience with ASIC design flows and electrical engineering fundamentals.
Working knowledge and experience with POCV, derating methodologies, and timing analysis.
Strong hands-on experience with industry-standard STA tools (e.g. PrimeTime, Tempus).
Solid hands-on experience with clock tree synthesis (CTS), multi-voltage and multi-clock designs.
Working knowledge of formal equivalency checks, low-power checks, timing constraints, UPF.
Strong scripting /programming skills in Tcl, Perl, Shell, and/or Python.
Show more Show less
Similar Jobs
M
PRINCIPAL RTL DESIGN
Micron · Boise, United States, North America
M
Principal Engineer, High‑Speed RTL Design
Micron · Bangalore, India, Asia
N
ASIC TOP Floorplan Design Engineer
NVIDIA · Shanghai, China, Asia
N
Senior System Software Engineer, SoC Power and Performance - O-RAN Infrastructure
NVIDIA · 3 Locations