ST
Sr. Design Verification Engineer
Accepting applicationsScaledge Technology · Bengaluru, Karnataka, India
Full-Time Mid_senior DDREthernetPCIeUSBUVM
Estimated market salary
₹24-44 LPA
This is a SiliconBoard market estimate, not an employer-posted salary.
Posted
1d ago
Category
Verification
Experience
Mid_senior
Country
India
5+ Years Experience in System Verilog and UVM methodology
Hands-on expertise in high-speed interface protocols (PCIe / CXL/UCIE/USB / DDR / Ethernet / AXI, etc.)
Good understanding of verification concepts, coverage, assertions, and debugging
Experience with simulation tools (VCS, Questa, Xcelium, etc.)
Strong analytical & problem-solving skills
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Hands-on expertise in high-speed interface protocols (PCIe / CXL/UCIE/USB / DDR / Ethernet / AXI, etc.)
Good understanding of verification concepts, coverage, assertions, and debugging
Experience with simulation tools (VCS, Questa, Xcelium, etc.)
Strong analytical & problem-solving skills
Show more Show less