T
Sr. Design Lead
Accepting applicationsTessolve · Bengaluru, Karnataka, India
Full-Time Mid_senior ASICCadenceDDRI2CPCIe
Estimated market salary
₹17-30 LPA
This is a SiliconBoard market estimate, not an employer-posted salary.
Posted
6d ago
Category
Verification
Experience
Mid_senior
Country
India
About Us
Tessolve offers a unique combination of pre-silicon and post-silicon expertise to provide an efficient turnkey solution for silicon bring-up, and spec to the product. With 3200+ employees worldwide, Tessolve provides a one-stop-shop solution with full-fledged hardware and software capabilities, including its advanced silicon and system testing labs.
Tessolve offers a Turnkey ASIC Solution, from design to packaged parts. Tessolve’s design services include solutions on advanced process nodes with a healthy eco-system relationship with EDA, IP, and foundries. Our front-end design strengths integrated with the knowledge from the backend flow, allows Tessolve to catch design flaws ahead in the cycle, thus reducing expensive re-design costs, and risks. We actively invest in the R&D center of excellence initiatives such as 5G, mmWave, Silicon photonics, HSIO, HBM/HPI, system-level test, and others. Tessolve also offers end-to-end product design services in the embedded domain from concept to manufacturing under an ODM model with application expertise in Avionics, Automotive, Industrial and Medical segments. Tessolve’s Embedded Engineering services enable customers a faster time-to-market through deep domain expertise, innovative ideas, diverse embedded hardware & software services, and built-in infrastructure with world-class lab facilities.
Tessolve’s clientele includes Tier 1 clients across multiple market segments, 9 of the top 10 semiconductor companies, start-ups, and government entities. We have a global presence over 12 countries with office locations in the United States, India, Singapore, Malaysia, Germany, United Kingdom, Canada, UK, Japan, Taiwan, Philippines, and Test Labs in India, Singapore, Malaysia, Austin, San Jose.
For more details, visit https://www.tessolve.com/
**Job Overview**
This Verification Engineer role focuses on IP and SoC verification using SystemVerilog/UVM with VIP integration, protocol and interface validation, and coverage closure. The position requires strong testbench development, scripting, and documentation skills, contributing to reliable silicon delivery within semiconductor or embedded systems teams in a global environment.
Job Designation**: Verification Engineer
Years of Exp**: 5 to 15 years minimum
Job Location**: Not specified
**What you'll do**
Develop and execute IP and SoC verification environments using SystemVerilog and UVM
Integrate and validate Verification IP for interconnect and peripheral protocols
Verify AHB, AXI, APB bus protocols and SOC interfaces like GPIO, SPI, I2C, UART
Validate high-speed interfaces such as PCIe Gen3/4, USB, MIPI, UPF, or DDR
Drive coverage closure across code, functional, and toggle domains
Use industry simulators such as Synopsys VCS or Cadence Incisive for verification
Produce technical documentation: testbench and test plan specifications
Apply scripting (Perl, Python, Shell, TCL) to automate verification tasks
**Who you are**
Holds a Bachelor's degree in Electronics Engineering or equivalent qualification
Advanced degree in Electronics or Computer Science is an advantage
Experienced working within multi-national or distributed engineering teams
Strong verbal and written communication and collaboration skills
Detail-oriented with a focus on quality and timely delivery
Tessolve Semiconductor Private Limited, as well as its affiliates and subsidiaries (“Tessolve”) does not require job applicants to make any payments at any stage of the hiring process. Any request for payment in exchange for a job opportunity at Tessolve is fraudulent and should be ignored. If you receive any such communication, we strongly advise you to refrain from making any payments and to promptly report the incident to us at hr@tessolve.com. Tessolve is not responsible for any losses incurred due to such fraudulent activities
Show more Show less
Tessolve offers a unique combination of pre-silicon and post-silicon expertise to provide an efficient turnkey solution for silicon bring-up, and spec to the product. With 3200+ employees worldwide, Tessolve provides a one-stop-shop solution with full-fledged hardware and software capabilities, including its advanced silicon and system testing labs.
Tessolve offers a Turnkey ASIC Solution, from design to packaged parts. Tessolve’s design services include solutions on advanced process nodes with a healthy eco-system relationship with EDA, IP, and foundries. Our front-end design strengths integrated with the knowledge from the backend flow, allows Tessolve to catch design flaws ahead in the cycle, thus reducing expensive re-design costs, and risks. We actively invest in the R&D center of excellence initiatives such as 5G, mmWave, Silicon photonics, HSIO, HBM/HPI, system-level test, and others. Tessolve also offers end-to-end product design services in the embedded domain from concept to manufacturing under an ODM model with application expertise in Avionics, Automotive, Industrial and Medical segments. Tessolve’s Embedded Engineering services enable customers a faster time-to-market through deep domain expertise, innovative ideas, diverse embedded hardware & software services, and built-in infrastructure with world-class lab facilities.
Tessolve’s clientele includes Tier 1 clients across multiple market segments, 9 of the top 10 semiconductor companies, start-ups, and government entities. We have a global presence over 12 countries with office locations in the United States, India, Singapore, Malaysia, Germany, United Kingdom, Canada, UK, Japan, Taiwan, Philippines, and Test Labs in India, Singapore, Malaysia, Austin, San Jose.
For more details, visit https://www.tessolve.com/
**Job Overview**
This Verification Engineer role focuses on IP and SoC verification using SystemVerilog/UVM with VIP integration, protocol and interface validation, and coverage closure. The position requires strong testbench development, scripting, and documentation skills, contributing to reliable silicon delivery within semiconductor or embedded systems teams in a global environment.
Job Designation**: Verification Engineer
Years of Exp**: 5 to 15 years minimum
Job Location**: Not specified
**What you'll do**
Develop and execute IP and SoC verification environments using SystemVerilog and UVM
Integrate and validate Verification IP for interconnect and peripheral protocols
Verify AHB, AXI, APB bus protocols and SOC interfaces like GPIO, SPI, I2C, UART
Validate high-speed interfaces such as PCIe Gen3/4, USB, MIPI, UPF, or DDR
Drive coverage closure across code, functional, and toggle domains
Use industry simulators such as Synopsys VCS or Cadence Incisive for verification
Produce technical documentation: testbench and test plan specifications
Apply scripting (Perl, Python, Shell, TCL) to automate verification tasks
**Who you are**
Holds a Bachelor's degree in Electronics Engineering or equivalent qualification
Advanced degree in Electronics or Computer Science is an advantage
Experienced working within multi-national or distributed engineering teams
Strong verbal and written communication and collaboration skills
Detail-oriented with a focus on quality and timely delivery
Tessolve Semiconductor Private Limited, as well as its affiliates and subsidiaries (“Tessolve”) does not require job applicants to make any payments at any stage of the hiring process. Any request for payment in exchange for a job opportunity at Tessolve is fraudulent and should be ignored. If you receive any such communication, we strongly advise you to refrain from making any payments and to promptly report the incident to us at hr@tessolve.com. Tessolve is not responsible for any losses incurred due to such fraudulent activities
Show more Show less