SoC Verification Lead Engineer

Job Qualification

Bachelor’s degree or above in Microelectronics, Electronics, Electrical Engineering,
8+ years of experience in SoC and UVM verification
Understanding of SoC architecture and functionality
Understanding of directed and constrained random verification methodology Good knowledge in UVM, Verilog, SystemVerilog, C/C++, Shell, Python
Strong debug, logical thinking and analytical skills
Good English communication skills, both verbal and written.

Job Responsibilities

Define and own verification plans, methodologies, and coverage strategies for complex SoC designs
Architect and implement UVM-based verification environments from scratch and enhance existing frameworks
Drive block-level, subsystem-level, and full-chip verification
Develop and maintain SystemVerilog/UVM testbenches, including:
Agents, sequences, drivers, monitors, and scoreboards
Reusable verification IPs (VIPs)
Integrate industry-standard VIPs (AXI, AHB, APB, PCIe, Ethernet, USB, etc.)
Lead SoC integration verification, including:
CPU subsystems (ARM architecture)
Interconnects, memory subsystems, clocks, resets, and power domains
Validate boot flows, firmware interactions, and system-level use cases
Collaborate with firmware and software teams for HW/SW co-verification
Experience in Gate level simulations and debug of gate level simulations
Experience in formal verification methodology
Perform root-cause analysis of functional, protocol, and performance issues
Own functional and code coverage closure
Drive regression, triage failures, and ensure quality sign-off
Mentor junior and mid-level verification engineers
Act as technical lead or owner for key verification deliverables
Work closely with design, DFT, validation, and software teams
More information about NXP in India...

Show more Show less