SOC / System Validation Architect

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SOC / System Validation Architect

Roles & Responsibilities

Validation Architecture & Strategy
Define end‑to‑end SoC validation architecture spanning pre‑silicon (simulation, emulation, FPGA) and post‑silicon validation.
Drive validation strategy alignment with SoC architecture, use‑cases, and product requirements.
Architect coverage models (functional, scenario, performance, power, security, RAS).
Define shift‑left validation methodologies to uncover system issues early.
Pre‑Silicon Validation Leadership
Lead validation architecture using:
Simulation (UVM‑based, hybrid environments)
Emulation / acceleration platforms
FPGA‑based prototyping
Enable system‑level use‑case validation involving CPU, GPU, accelerators, IOs, memory, and fabrics.
Guide complex cross‑IP and cross‑subsystem debug (RTL, firmware, software interactions).
Post‑Silicon & Silicon Bring‑Up
Architect post‑silicon validation frameworks, diagnostics, and automation.
Drive early silicon bring‑up, debug, and characterization.
Ensure validation of performance, power, thermals, security, and RAS features.
Partner with manufacturing and product teams to support production readiness.
Cross‑Functional Technical Leadership
Act as a technical authority across validation, influencing design decisions upstream.
Collaborate with:
SoC Architects
IP owners
Firmware / BIOS teams
System software and OS teams
Represent validation in architecture reviews, tape‑out readiness, and exec forums.

The Person

A successful candidate will work with senior silicon design and validation engineers. The candidate will be highly accurate and detail-oriented, possessing good communication and problem-solving skills.

Required Qualifications

15+ years of experience in SoC validation, or system architecture.
Deep expertise in SoC validation methodologies (pre‑ and post‑silicon).
Strong understanding of:
CPU/GPU architectures
Interconnects and fabrics (NoC)
Memory subsystems (DDR, HBM, cache coherency)
High‑speed IOs (PCIe, Ethernet, USB, CXL, etc.)
Hands‑on experience with emulation platforms.
Proven strength in complex system‑level debug across HW/FW/SW boundaries.
Excellent communication and technical influence skills.

Preferred Experience

Experience validating server, datacenter, automotive, or high‑performance SoCs.
Expertise in RAS, security, and safety validation.
Experience with production silicon ramp and yield learning.
Prior role as technical architect or fellow‑level contributor.
Publications, patents, or industry leadership contributions are a plus.
Academic Credentials

Bachelors or Masters degree in computer engineering/Electrical Engineering


Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.

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