SoC Memory Interconnect Validation Engineer

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Title: - SoC Memory Interconnect Validation Engineer

Location: - Austin, TX (On-Site)

Role Type: - 6+ Months (Contract)

Key Responsibilities:

Participate in systems design development throughout entire product lifecycle, from pre-silicon and emulation through post-silicon and software integration and validation.
Lead technical presentations, demonstrating a good understanding of hardware architecture and expertise in systems design
Collaborate with Design, Software, Tools and other teams to drive the definition of testing and debug methodologies to provide the best possible coverage and customer experience for the AMD data fabric layer.
Work with Program Leadership team to define the end-to-end plan and highlight possible risk areas and address concerns during planning.
Isolation and debug of issues found in the northbridge and memory interconnect systems during pre-silicon, bring-up, validation, and production phases of S3 products
Able to proactively support team culture that fosters knowledge sharing, excellence, and collaboration
Defining and executing validation strategies, enablement of features and unit test plans
Publishing and aligning test plan requirements, deliverables and dependencies
Working closely with supporting teams such as design, diagnostics, Software/Firmware/BIOS/driver, and project leadership
Lead cross-functional technical discussions to drive root cause identification and resolution on technical issues
Driving and participating in technical innovations to enhance AMD’s validation capabilities including tool and script developments, technical and methodology enhancements

Requirements:

In-depth knowledge of CPU memory hierarchy systems and computer architecture
In-depth knowledge of SOC architecture and concepts
In-depth knowledge of northbridge / southbridge technology
Experience with FPGA and other hardware emulation platforms for pre-silicon debug
Strong understanding of BIOS, OS (Windows/Linux), and driver-level interactions and common failure points
Good understanding of Boot Flows/Sequences
Led process improvement initiatives to improve engineering quality
Strong technical leadership and mentoring skills
Knowledge of standard power management features and use-cases

Preferred Experience:

Minimum 3-6 years of experience in pre and post-silicon validation and 4-8 years’ experience in semiconductor industry
Demonstrated ability to grasp new technical concepts quickly
Strong programming/scripting skills (e.g. Python, C/C++, Ruby)
Experience with Windows and Linux
Experience with IP/System level bring-up, SOC debug techniques and methodologies
Strong analytical/problem solving skills and pronounced attention to details
Excellent written and verbal communication skills
Self-starter, strong collaborator, and able to independently drive tasks to completion
Strong organizational skills and ability to handle multiple issues at the same time

Academic Credentials:

Bachelor’s/master’s degree in computer engineering, Electrical Engineering or related field strongly preferred
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