Job Details:

Job Description: 

The Role and Impact

• Support development and maintenance of assembly design rules that addresses the capabilities and constraints of advanced silicon packaging and heterogeneous integration.

• Contribute to package assembly design kit by creating and evaluating test cases for different assembly configurations.

• Evaluate constraints arising from multidie integration, including flipchip, substrate routing, bump placements, and interconnect patterns, ensuring compliance with documented assembly rules.

• Interpret design rule impacts on manufacturability, yield, and system-level integration requirements.

• Assist in reviewing bump layouts and propose corrections across a design life cycle.

• Prepare reports summarizing rule checks, violations, and recommendations, helping maintain an up to date, well organized assembly rule knowledge base.

Key Responsibilities

• Assist in the validation, debugging, and testing of silicon products, from initial bring-up to high-volume manufacturing.

• Collaborate with cross-functional teams to resolve engineering challenges, optimize product performance, and improve yield and reliability.

• Learn and apply principles of design for test (DFT), manufacturing (DFM), and debugging techniques to support product lifecycle and qualification.

• Conduct root cause analysis and problem-solving to identify and address engineering issues effectively.

• Contribute to the development and optimization of test engineering processes, tools, and documentation.

• Support the analysis and optimization of power and performance metrics for silicon products.

• Continuously build technical knowledge and skills through hands-on experience and collaborative projects.

Qualifications:

Minimum Qualifications

• Currently pursuing a Masters or PhD in Electrical Engineering, Computer Engineering, or a related field with a focus on semiconductor devices or silicon testing.

• 3+ months experience with packaging assembly design.

• Experience with root cause analysis and problem solving in a technical environment.

• Familiarity with technical documentation and communication of engineering results.

Preferred Qualifications

• Demonstrated ability to collaborate effectively with cross-functional teams in a research or engineering environment.

• Knowledge of design for debug (DFD) principles and their applications in silicon validation.

• Strong interest in continuous learning and improvement within the semiconductor domain.

• Passion for making meaningful contributions to innovative technologies and products.

If you are looking to apply your academic expertise to real-world challenges and accelerate your career in silicon product engineering, we encourage you to take the next step with Intel.

          

Job Type:

Student / Intern

Shift:

Shift 1 (United States of America)

Primary Location: 

US, Oregon, Hillsboro

Additional Locations:

US, Arizona, Phoenix

Business group:

Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers -- from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Employees in the Foundry Technology Manufacturing are part of a worldwide factory network that designs, develops, manufactures, and assembly/test packages the compute devices to improve the lives of every person on Earth.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

 

 

Annual Salary Range for jobs which could be performed in the US: $89,200.00-120,700.00 USD

 

 

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Our standard internship rates are based on your degree, location, and the job role. Your recruiter can share more about the specific compensation range for your preferred location and job role during the hiring process.

 

 

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

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ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.