Silicon Design Verification Engineer

Minimum qualifications:

Bachelor's degree in Electrical Engineering, Computer Science, a related field, or equivalent practical experience.
1 year of experience verifying digital logic at register-transfer level (RTL) using SystemVerilog.
Experience verifying digital intellectual property (IP) and subsystems.

Preferred qualifications:

Master's degree in Electrical Engineering, Computer Science, a related field, or equivalent practical experience.
Experience creating and utilizing UVM-based verification environments.
Experience with image processing, computer vision, or machine learning applications.
Familiarity with ASIC standard interfaces and memory system architecture.

About the jobBe part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

Individual pay is determined by factors including job-related skills, experience, and relevant education or training.

US: $116000 - $166000 (USD) + 15% bonus target + equity + benefits

Responsibilities

Learn more about benefits at Google .

Plan the verification of digital design blocks by analyzing specifications and collaborating with design engineers to identify critical scenarios.
Develop and enhance constrained-random verification environments using SystemVerilog and universal verification methodology (UVM), or formally verify designs using SystemVerilog Assertions (SVA).
Design and implement comprehensive coverage measures to target functional stimulus and corner-case scenarios.
Debug test failures in collaboration with design engineers to ensure functionally correct digital blocks.
Analyze coverage data to identify verification gaps and track progress toward tape-out milestones.


Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form .
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