ET
Signal Integrity Engineer
Accepting applicationsEuropean Tech Recruit · Johns Creek, GA
Full-Time Mid_senior DDRSERDESSPICE
Posted
3d ago
Category
Design
Experience
Mid_senior
Country
United States
🚀 Signal Integrity Engineer – Hybrid | Johns Creek, Georgia
We're hiring on behalf of a global semiconductor IP licensing leader — a company at the forefront of memory interface technology, chip design, and high-speed connectivity solutions that power the world's most advanced computing systems.
This is a highly visible role within a collaborative SI/PI team, where you'll drive modelling, analysis, and simulation of Signal and Power Integrity in one of the most technically demanding areas in the industry — DDR memory interfaces running at speeds exceeding 12,800 MT/s.
What You'll Be Doing:
🔬 Developing SI/PI methodologies and driving package design for next-generation DDR product portfolios ⚙️ Partnering with design and validation teams to define system specs — PCB routing, IC-PKG-BRD decoupling, channel simulations, and jitter sensitivity analysis 📊 Guiding design teams through SI/PI simulation and silicon correlation to achieve best-in-class RMT scores 🤝 Collaborating directly with customers to engineer optimum SI/PI solutions 🧪 Supporting lab debug and bring-up activities as needed
What You'll Bring:
✅ MS or PhD in Electrical Engineering with 10+ years of industry experience, including meaningful exposure to DDR4/5
✅ Proven experience simulating high-speed memory (DDR4/DDR5) and/or SERDES interfaces
✅ Deep theoretical grounding in EM, transmission line theory, and equalization techniques (FIR/FFE/DFE/CTLE)
✅ Hands-on expertise with package and PCB design; ability to edit APD/Allegro layout files and apply SI/PI-driven BGA assignment methodology
✅ Strong correlation experience between simulation and lab measurements using scopes, TDRs, and VNAs
✅ Proficiency in SPICE, ADS, HFSS, Q3D/PowerSI; familiarity with RedHawk/Totem, XcitePI, or Virtuoso is a strong plus
✅ Understanding of server system architecture from CPUs to DRAM DIMM modules
✅ Excellent written, verbal, and cross-functional communication skills
The Details:
📍 Johns Creek, Georgia, USA 🏢 Hybrid — multiple days on-site per week required 🎓 MS/PhD in Electrical Engineering preferred
This is a rare opportunity to contribute to technology that sits at the heart of modern computing — working alongside world-class engineers on problems that truly matter.
Interested or know someone who'd be a great fit? Drop a comment or send a DIN message!
#SignalIntegrity #PowerIntegrity #SemiconductorJobs #DDR5 #HighSpeedDesign #EEJobs #HiringNow #GeorgiaTech #PCBDesign #ChipDesign
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We're hiring on behalf of a global semiconductor IP licensing leader — a company at the forefront of memory interface technology, chip design, and high-speed connectivity solutions that power the world's most advanced computing systems.
This is a highly visible role within a collaborative SI/PI team, where you'll drive modelling, analysis, and simulation of Signal and Power Integrity in one of the most technically demanding areas in the industry — DDR memory interfaces running at speeds exceeding 12,800 MT/s.
What You'll Be Doing:
🔬 Developing SI/PI methodologies and driving package design for next-generation DDR product portfolios ⚙️ Partnering with design and validation teams to define system specs — PCB routing, IC-PKG-BRD decoupling, channel simulations, and jitter sensitivity analysis 📊 Guiding design teams through SI/PI simulation and silicon correlation to achieve best-in-class RMT scores 🤝 Collaborating directly with customers to engineer optimum SI/PI solutions 🧪 Supporting lab debug and bring-up activities as needed
What You'll Bring:
✅ MS or PhD in Electrical Engineering with 10+ years of industry experience, including meaningful exposure to DDR4/5
✅ Proven experience simulating high-speed memory (DDR4/DDR5) and/or SERDES interfaces
✅ Deep theoretical grounding in EM, transmission line theory, and equalization techniques (FIR/FFE/DFE/CTLE)
✅ Hands-on expertise with package and PCB design; ability to edit APD/Allegro layout files and apply SI/PI-driven BGA assignment methodology
✅ Strong correlation experience between simulation and lab measurements using scopes, TDRs, and VNAs
✅ Proficiency in SPICE, ADS, HFSS, Q3D/PowerSI; familiarity with RedHawk/Totem, XcitePI, or Virtuoso is a strong plus
✅ Understanding of server system architecture from CPUs to DRAM DIMM modules
✅ Excellent written, verbal, and cross-functional communication skills
The Details:
📍 Johns Creek, Georgia, USA 🏢 Hybrid — multiple days on-site per week required 🎓 MS/PhD in Electrical Engineering preferred
This is a rare opportunity to contribute to technology that sits at the heart of modern computing — working alongside world-class engineers on problems that truly matter.
Interested or know someone who'd be a great fit? Drop a comment or send a DIN message!
#SignalIntegrity #PowerIntegrity #SemiconductorJobs #DDR5 #HighSpeedDesign #EEJobs #HiringNow #GeorgiaTech #PCBDesign #ChipDesign
Show more Show less