Senior Staff Verification Engineer, High-Speed Interface IP

We Are

Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

You Are

You have spent years making sure that IP cores actually work, not just in the lab under ideal conditions, but in the real world where timing edges matter and corner cases break things. You know that verification is not about running tests, it is about finding the breaks before they ship, and you have built the instincts to know where to look. You think in coverage metrics and corner cases, but you also understand the bigger picture: the IP you verify powers everything from automotive safety systems to data center connectivity, and getting it right matters.

You are comfortable architecting a verification environment from scratch using SystemVerilog and UVM, and you know how to make those environments scale across multiple engineers and sites. Protocols like MIPI-I3C, PCIe, USB, and AMBA are not just acronyms to you, you understand their state machines, their edge cases, and what breaks when implementations cut corners. You have debugged enough waveforms to know when a failure is a testbench issue, an RTL bug, or something more subtle in the protocol itself.

You do not wait for perfect specs. You work with what you have, ask the right questions, build coverage models that expose real gaps, and drive closure without losing momentum. At Synopsys, you will work on IP that ships into millions of devices, and the verification environments you build will set the standard for the team.

What You'll Be Doing

Architect and implement advanced SystemVerilog verification environments for DesignWare high-speed interface IP cores, including testbenches, checkers, and functional coverage models
Develop comprehensive test plans covering unit-level and system-level requirements, then write the test cases and assertions that validate them
Build and maintain regression suites using VCS, NC, or MTI, analyzing coverage gaps and driving metrics toward 100% functional closure
Debug complex protocol interactions and RTL issues across multi-layer verification stacks, working directly with design engineers to resolve root causes
Automate verification flows using Perl, TCL, or Python to streamline regressions, coverage extraction, and reporting
Contribute to methodology improvements, including VIP development, formal verification integration, and UVM framework enhancements
Collaborate with global verification teams across Bangalore, the US, and other sites to align on verification strategies and share reusable components

The Impact You Will Have

Deliver high-quality IP cores that enable next-generation connectivity in commercial, enterprise, and automotive applications, directly affecting millions of end products
Catch critical bugs early in the development cycle, reducing costly respins and accelerating time to market for Synopsys customers
Set the verification quality bar for DesignWare IP, establishing methodologies and coverage standards that other teams will adopt
Strengthen Synopsys' reputation as the IP provider that ships robust, silicon-proven solutions customers can trust
Mentor junior verification engineers, sharing your expertise in coverage-driven verification, protocol debugging, and testbench architecture
Enable cross-site collaboration by building reusable verification IP and frameworks that scale across global R&D teams
Drive innovation in verification approaches, exploring formal methods and advanced UVM techniques that make verification faster and more thorough

What You'll Need

BSEE with 8+ years or MSEE with 5+ years of hands-on experience in ASIC or IP verification
Deep expertise in SystemVerilog and UVM, OVM, or VMM methodologies, with a proven track record of building verification environments from the ground up
Strong working knowledge of industry-standard simulators such as VCS, NC, or MTI, and experience debugging complex failures using waveform viewers and log analysis
Solid understanding of high-speed interface protocols including MIPI-I3C, UFS, AMBA, PCIe, USB, Ethernet, or DDR, with the ability to ramp quickly on new protocols
Proficiency in scripting languages like Perl, TCL, or Python for automation, flow development, and data extraction
Experience with functional coverage-driven verification and a track record of meeting or exceeding quality metrics in production IP projects
Exposure to formal verification or VIP development is a strong plus

Who You Are

You can look at a failing regression and quickly isolate whether the issue is in the testbench, the RTL, the protocol compliance, or the tool itself
You write test plans that anticipate edge cases others miss, and your coverage models expose gaps that matter, not just lines of code
You communicate technical tradeoffs clearly, whether you are explaining a coverage hole to a peer or walking a design lead through a protocol violation
You take ownership of verification closure without needing constant direction, you know what needs to happen and you make it happen
You thrive in multi-site collaboration, comfortable working across time zones and cultures to align on verification strategies and share results
You stay current with verification methodologies and tools, always looking for ways to make the next environment better than the last

The Team You'll Be Part Of

You will join the Solutions Group's DesignWare IP Verification R&D team, a highly skilled and diverse group of engineers dedicated to delivering world-class IP cores for next-generation connectivity. The team operates in a collaborative, multi-site environment, leveraging global expertise to solve complex verification challenges. Together, you will drive innovation, share knowledge, and uphold Synopsys' reputation for technical leadership and excellence.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
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