LT
Senior Staff Engineer
Accepting applicationsLeadSoc Technologies Pvt Ltd · Bengaluru, Karnataka, India
Full-Time Mid_senior ARMASICAnalogCadenceDFT
Estimated market salary
₹24-44 LPA
This is a SiliconBoard market estimate, not an employer-posted salary.
Posted
3d ago
Category
Verification
Experience
Mid_senior
Country
India
Senior Staff Engineer – Design Verification (IP/SoC)
Location: Bengaluru, India
Experience: 10–15 Years
Role
Own end-to-end verification of complex IPs and SoCs for next-generation semiconductor products. Drive verification architecture, methodology, debug, and signoff for high-performance silicon.
What You'll Do
Lead IP & SoC verification from verification planning to coverage closure and signoff.
Build scalable SystemVerilog/UVM environments, VIPs, scoreboards, assertions (SVA), and functional coverage.
Verify high-speed interfaces including PCIe Gen4/5/6, CXL, DDR4/5, LPDDR4/5, HBM, USB3/USB4, Ethernet, UCIe, AXI/AHB/APB.
Drive SoC integration, subsystem verification, low-power (UPF/CPF), CDC/RDC, and regression closure.
Partner with Architecture, RTL, DFT, Firmware, Emulation, and Post-Silicon teams to achieve first-pass silicon success.
Mentor engineers and drive verification best practices across programs.
What You Bring
10–15 years of hands-on IP/SoC Design Verification experience.
Expert in SystemVerilog, UVM, SVA, Functional Coverage, Constrained Random Verification, and debug.
Strong understanding of SoC architecture, memory subsystems, cache coherency, interconnects, interrupts, and power management.
Experience with Synopsys VCS, Cadence Xcelium, Siemens Questa, Verdi/DVE or equivalent debug tools.
Exposure to Emulation (ZeBu/Palladium/Veloce) and Formal Verification is a plus.
About Us:
LeadSoC Technologies offers cutting edge Engineering Design services in VLSI and Embedded Systems. We have been growing rapidly over the last 9 years to meet the evolving needs of the Semiconductor, Automotive, Telecom and Consumer Electronics segments. Our End-to-End VLSI design services span Micro Architecture to Tape Out and beyond with Post Silicon support. We have been involved in co-development of multiple SOC releases for our clients. LeadSoC has in house VLSI labs equipped with state of art tools (from leading EDA OEM’s) for grooming talent. We work on SOC’s, FPGA and ASIC platforms in areas spanning Digital Front End Design & Verification, Back End Design (RTL=> GDS), Analog & Custom Design & Verification. We also work on RF & Board Design for OEMs. Our Software practice works in areas spanning Firmware design, Hardware Abstraction, Kernel Space & User space design. We work on both bare metal and RTOS/Linux like platforms across x86, ARM, MIPS & Power PC architectures across multiple chipsets. Our presence in Concept to Manufacturing, spans across a broad spectrum of capabilities including Board Design, Platform Software solutions (Boot Loader, Bare Metal Firmware, Drivers/BSP, Abstraction layers), Middleware (Stacks, Frameworks, diagnostics), Target application, HMI (industry standard frameworks), IoT and Cloud (AWS, GCP, Azure) applications and V&V services. We have an embedded Software COE with in-house Labs, powered by open-source tool chain equipped with variety of reference boards. This environment enables our engineers to play while they learn. It also creates an environment for the engineers to ideate / create reference Solutions, POC designs. Our teams have been involved in providing frameworks for On-board Diagnostics, Manufacturing diagnostics, Post & Pre-Silicon Validation and Performance Optimization for products based on Linux / RTOS platforms. We have also worked on migrating stacks from legacy to NextGen platforms.
Website
http://www.leadsoc.com
Show more Show less
Location: Bengaluru, India
Experience: 10–15 Years
Role
Own end-to-end verification of complex IPs and SoCs for next-generation semiconductor products. Drive verification architecture, methodology, debug, and signoff for high-performance silicon.
What You'll Do
Lead IP & SoC verification from verification planning to coverage closure and signoff.
Build scalable SystemVerilog/UVM environments, VIPs, scoreboards, assertions (SVA), and functional coverage.
Verify high-speed interfaces including PCIe Gen4/5/6, CXL, DDR4/5, LPDDR4/5, HBM, USB3/USB4, Ethernet, UCIe, AXI/AHB/APB.
Drive SoC integration, subsystem verification, low-power (UPF/CPF), CDC/RDC, and regression closure.
Partner with Architecture, RTL, DFT, Firmware, Emulation, and Post-Silicon teams to achieve first-pass silicon success.
Mentor engineers and drive verification best practices across programs.
What You Bring
10–15 years of hands-on IP/SoC Design Verification experience.
Expert in SystemVerilog, UVM, SVA, Functional Coverage, Constrained Random Verification, and debug.
Strong understanding of SoC architecture, memory subsystems, cache coherency, interconnects, interrupts, and power management.
Experience with Synopsys VCS, Cadence Xcelium, Siemens Questa, Verdi/DVE or equivalent debug tools.
Exposure to Emulation (ZeBu/Palladium/Veloce) and Formal Verification is a plus.
About Us:
LeadSoC Technologies offers cutting edge Engineering Design services in VLSI and Embedded Systems. We have been growing rapidly over the last 9 years to meet the evolving needs of the Semiconductor, Automotive, Telecom and Consumer Electronics segments. Our End-to-End VLSI design services span Micro Architecture to Tape Out and beyond with Post Silicon support. We have been involved in co-development of multiple SOC releases for our clients. LeadSoC has in house VLSI labs equipped with state of art tools (from leading EDA OEM’s) for grooming talent. We work on SOC’s, FPGA and ASIC platforms in areas spanning Digital Front End Design & Verification, Back End Design (RTL=> GDS), Analog & Custom Design & Verification. We also work on RF & Board Design for OEMs. Our Software practice works in areas spanning Firmware design, Hardware Abstraction, Kernel Space & User space design. We work on both bare metal and RTOS/Linux like platforms across x86, ARM, MIPS & Power PC architectures across multiple chipsets. Our presence in Concept to Manufacturing, spans across a broad spectrum of capabilities including Board Design, Platform Software solutions (Boot Loader, Bare Metal Firmware, Drivers/BSP, Abstraction layers), Middleware (Stacks, Frameworks, diagnostics), Target application, HMI (industry standard frameworks), IoT and Cloud (AWS, GCP, Azure) applications and V&V services. We have an embedded Software COE with in-house Labs, powered by open-source tool chain equipped with variety of reference boards. This environment enables our engineers to play while they learn. It also creates an environment for the engineers to ideate / create reference Solutions, POC designs. Our teams have been involved in providing frameworks for On-board Diagnostics, Manufacturing diagnostics, Post & Pre-Silicon Validation and Performance Optimization for products based on Linux / RTOS platforms. We have also worked on migrating stacks from legacy to NextGen platforms.
Website
http://www.leadsoc.com
Show more Show less