L
Senior Staff Design Engineer, IC Layout
Accepting applicationsLadders · United States
Full-Time Principal CadenceRFSOCanalogmentor
Posted
1d ago
Category
Design
Experience
Principal
Country
United States
For our client, we are seeking a Senior Staff Design Engineer IC Layout to join the team of a leader in the Manufacturing & Automotive space. This role will lead operational priorities focused on execution quality, efficiency, safety, and measurable performance outcomes. You will collaborate with field leadership, support functions, and cross-functional stakeholders to improve accountability, service delivery, and operational consistency. The position offers the opportunity to influence operational scale, customer outcomes, and organizational performance within a manufacturing environment.
Location: Remote - US based candidates only, no visa sponsorship available
Compensation: $158,700 – $238,100 annually
Responsibilities
Leverage TDBU methodology for floorplan creation and refinement
Collaborate with design teams on power supply strategy and signal distribution
Coordinate with cross-functional teams to ensure a predictable layout schedule
Conduct layout reviews and complete full-chip closure activities
Perform detailed transistor-level layout for RF and mixed-signal circuits
Partake in developing IC layout methodologies with various teams
Qualifications
Bachelor's or master's in computer or electrical engineering or related technical field, with 12+ years of experience
Expertise in custom analog, RF, and mixed-signal layout, leading from conception to tape-out
Familiarity with tape-out flows and database preparation
Proven ability to mentor layout engineers and lead complex IC integration
Deep understanding of full-chip/SOC-level floorplanning and integration techniques
Knowledge of semiconductor manufacturing processes down to 16nm process nodes
Strong capability in Cadence Virtuoso and layout verification tools
Benefits
Healthcare benefits, including access to various plans
401(k) plan with company match
Potential for merit increases, annual bonuses, and stock options based on performance
Opportunities for sales incentives in relevant roles
Our client is an equal opportunity employer. We encourage you to apply even if you don’t meet every qualification—your background could be exactly what this team needs.
Show more Show less
Location: Remote - US based candidates only, no visa sponsorship available
Compensation: $158,700 – $238,100 annually
Responsibilities
Leverage TDBU methodology for floorplan creation and refinement
Collaborate with design teams on power supply strategy and signal distribution
Coordinate with cross-functional teams to ensure a predictable layout schedule
Conduct layout reviews and complete full-chip closure activities
Perform detailed transistor-level layout for RF and mixed-signal circuits
Partake in developing IC layout methodologies with various teams
Qualifications
Bachelor's or master's in computer or electrical engineering or related technical field, with 12+ years of experience
Expertise in custom analog, RF, and mixed-signal layout, leading from conception to tape-out
Familiarity with tape-out flows and database preparation
Proven ability to mentor layout engineers and lead complex IC integration
Deep understanding of full-chip/SOC-level floorplanning and integration techniques
Knowledge of semiconductor manufacturing processes down to 16nm process nodes
Strong capability in Cadence Virtuoso and layout verification tools
Benefits
Healthcare benefits, including access to various plans
401(k) plan with company match
Potential for merit increases, annual bonuses, and stock options based on performance
Opportunities for sales incentives in relevant roles
Our client is an equal opportunity employer. We encourage you to apply even if you don’t meet every qualification—your background could be exactly what this team needs.
Show more Show less