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Senior SoC FE Lead

Accepting applications

Cortex Consultants LLC · Bangalore Urban, Karnataka, India

Full-Time Mid_senior ARMASICC++CadencePCIe
Estimated market salary
₹25-44 LPA

This is a SiliconBoard market estimate, not an employer-posted salary.

Posted
5d ago
Category
Design
Experience
Mid_senior
Country
India
Senior SoC Front End

FULL-TIME

15+ Years of exp

Location : Bangalore / Hyderabad

Job Description

We are seeking a highly accomplished Senior SoC FE Design to drive highly sophisticated SoC design for our global semiconductor Custom Silicon design initiatives in advanced semiconductor nodes 8nm, 5nm, 3nm. This role centers on technical vision, engineering depth, and cross-regional collaboration, executed jointly by teams in India and Europe. The ideal candidate is a proven design leader capable of guiding distributed engineering organizations toward innovation, best-in-class quality, and first-pass silicon success

You will play a key role in our projects and interact with the design, verification and physical design team as well as with international customers.

This position offers the opportunity to work on cutting-edge technologies for our highly complex SoC and image pipeline development projects.

Responsibilities

Capturing of the design requirements of complex SoCs working with SoC Architects. This includes technical evaluation technology, internal and external IP fulfilling the customer requirements in a wide spectrum of applications in the automotive, industrial or commercial context

Support the technical discussions with customers for the alignment of requirements, keeping track of functionality as well as power-performance-area restrictions. Support of our Sales department in technical discussions already in the project acquisition phase

Writing of design requirements and functional Top-Level Specifications together with our team of architects. Typically accompanying the complete Lifecyle with direct contact to our Design-, Verification-, Backend- and Test-Teams as well as being close contact to the project management

Perform detailed calculations to specify computation throughput, memory bandwidth and latency, evaluate performance v/s area v/s power tradeoffs

Collaborate with software and firmware teams to ensure that the ASIC meets the required performance goals

Our Company

Tessolve Semiconductors a venture of Hero Electronix, part of $5B Hero Group companies a Design and Test Engineering Service Company providing End to End Solutions from Product Engineering, Software, Hardware, Wireless, Automotive and Embedded Solutions. Currently we are 3800+ employees worldwide.

We are Global Multi- National Company having Engineering and Sales presences in India, Malaysia, Singapore, USA, UK, Europe, and China. Tessolve has strategic and sustainable growth plan to ensure the business stability to our valued customers and to protect the career of our employees even under disturbed Business situations.

About You

You are highly motivated, not afraid of taking responsibility, and you are a team player. Besides having excellent problem-solving and analytical skills, you are an efficient professional, and you like to help extending our organization for further growth.

Qualifications

Master s or PhD degree in Electrical Engineering, Electronics Engineering or comparable

Minimum 15 years of experience in Digital ASIC architecture and proficient in VHDL, Verilog, SystemC.

Used to work in a customer-oriented, self-reliant, extremely reliable and structured manner and able to collaborate with international development teams

Strong interest in SoC architecture and SoC level chip design with a good understanding of hardware/software partitioning and decent knowledge on microprocessors, interconnect, memory architectures and HSIO IPs.

In depth IP knowledge for ARM Cortex A720 class processors, Network on Chip architectures such like Arteris FlexNoC, LPDDR5,6, PCIe Gen5/6, UCIe IP (Synopsys, Cadence), MIPI

Deep knowledge of requirements management is an advantage

Knowledge on the special aspect of functional safety (ISO 26262) is an advantage

Skills in C / C++ / SystemC / Python beneficial

Fluent in English, both written and spoken.

Excellent written and verbal communication skills
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