LR
Senior Signal Integrity Engineer
Accepting applicationsLangham Recruitment · Santa Barbara County, CA
Full-Time Mid_senior AIFPGA
Posted
12 Jun
Category
Design
Experience
Mid_senior
Country
United States
Senior Signal Integrity Engineer
Santa Barbara, CA
$220,000–$250,000 base salary + bonus + equity
We are seeking a Senior Signal Integrity Engineer to lead the design, modelling, and validation of high-speed optical link platforms for next-generation AI data centre interconnects.
In this role, you will own signal integrity across electrical and electro-optical channels—including PCB, package, connector, and photonic interfaces—ensuring reliable operation at state-of-the-art baud rates while meeting stringent BER targets.
Key Responsibilities
Lead signal integrity for high-speed links, including channel modelling, loss, reflection, crosstalk analysis, and equalisation strategies such as FFE, DFE, and CTLE.
Define and review high-speed channel architecture spanning PCB, package, connectors, and photonic interfaces.
Drive SI design reviews with external partners and ensure performance margin targets are achieved.
Support electrical-to-optical interface integrity, including driver-to-modulator and TIA/receiver signal paths.
Guide high-speed PCB design practices, including impedance control, return paths, vias, and discontinuity management.
Lead lab validation and bring-up activities using eye diagrams, BER testing, jitter analysis, VNA, and TDR measurements.
Correlate simulation results with measurement data and resolve performance gaps.
Support integration of photonic ICs, including coupling, packaging, wirebonding, and flip-chip assembly considerations.
Collaborate on FPGA-based high-speed evaluation platforms.
Serve as a technical liaison between internal engineering teams and external partners.
Requirements
Bachelor’s or Master’s degree in Electrical Engineering, Photonics, or a related field.
Strong experience with high-speed signal integrity in 100–200G+ per-lane systems.
Expertise in channel modelling, jitter analysis, and frequency- and time-domain SI techniques.
Hands-on experience with equalisation methods, including FFE, DFE, and CTLE.
Proven laboratory experience with oscilloscopes, BERTs, and VNAs.
Experience correlating simulation and measurement results.
Solid understanding of high-speed PCB design and system-level hardware integration.
What’s on offer
$220K–$250K + Bonus + Equity
End-to-end ownership of high-speed signal integrity in optical interconnect systems
Deep-tech startup environment working at the frontier of AI data centre connectivity
Show more Show less
Santa Barbara, CA
$220,000–$250,000 base salary + bonus + equity
We are seeking a Senior Signal Integrity Engineer to lead the design, modelling, and validation of high-speed optical link platforms for next-generation AI data centre interconnects.
In this role, you will own signal integrity across electrical and electro-optical channels—including PCB, package, connector, and photonic interfaces—ensuring reliable operation at state-of-the-art baud rates while meeting stringent BER targets.
Key Responsibilities
Lead signal integrity for high-speed links, including channel modelling, loss, reflection, crosstalk analysis, and equalisation strategies such as FFE, DFE, and CTLE.
Define and review high-speed channel architecture spanning PCB, package, connectors, and photonic interfaces.
Drive SI design reviews with external partners and ensure performance margin targets are achieved.
Support electrical-to-optical interface integrity, including driver-to-modulator and TIA/receiver signal paths.
Guide high-speed PCB design practices, including impedance control, return paths, vias, and discontinuity management.
Lead lab validation and bring-up activities using eye diagrams, BER testing, jitter analysis, VNA, and TDR measurements.
Correlate simulation results with measurement data and resolve performance gaps.
Support integration of photonic ICs, including coupling, packaging, wirebonding, and flip-chip assembly considerations.
Collaborate on FPGA-based high-speed evaluation platforms.
Serve as a technical liaison between internal engineering teams and external partners.
Requirements
Bachelor’s or Master’s degree in Electrical Engineering, Photonics, or a related field.
Strong experience with high-speed signal integrity in 100–200G+ per-lane systems.
Expertise in channel modelling, jitter analysis, and frequency- and time-domain SI techniques.
Hands-on experience with equalisation methods, including FFE, DFE, and CTLE.
Proven laboratory experience with oscilloscopes, BERTs, and VNAs.
Experience correlating simulation and measurement results.
Solid understanding of high-speed PCB design and system-level hardware integration.
What’s on offer
$220K–$250K + Bonus + Equity
End-to-end ownership of high-speed signal integrity in optical interconnect systems
Deep-tech startup environment working at the frontier of AI data centre connectivity
Show more Show less
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