AD
Senior RTL Design Engineers
Accepting applicationsACL Digital · Greater Bengaluru Area
Full-Time Mid_senior DDRRTLVLSI
Estimated market salary
₹21-38 LPA
This is a SiliconBoard market estimate, not an employer-posted salary.
Posted
3 Jun
Category
Design
Experience
Mid_senior
Country
India
RTL Design Engineers
Location: Bangalore
Experience: 4+ Years
Notice Period: Immediate Joiners / 0–15 Days Notice / Currently Serving Notice Period
Job Summary
We are looking for a highly motivated RTL Design Engineer with 4+ years of experience in front-end VLSI design. The ideal candidate should have strong RTL design and integration experience, with expertise in one or more of the following domains: RDC, MIPI, DDR, or LPDDR.
Show more Show less
Location: Bangalore
Experience: 4+ Years
Notice Period: Immediate Joiners / 0–15 Days Notice / Currently Serving Notice Period
Job Summary
We are looking for a highly motivated RTL Design Engineer with 4+ years of experience in front-end VLSI design. The ideal candidate should have strong RTL design and integration experience, with expertise in one or more of the following domains: RDC, MIPI, DDR, or LPDDR.
Show more Show less
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