NS
Senior Principal Analog Validation Engineer
Accepting applicationsNXP Semiconductors · Pune Division, Maharashtra, India
Full-Time Mid_senior ATEAnalogJTAGanalog
Estimated market salary
₹89-160 LPA
This is a SiliconBoard market estimate, not an employer-posted salary.
Posted
14 Jun
Category
Design
Experience
Mid_senior
Country
India
Job Responsibilities
Lead first-silicon bring-up, debug, and issue resolution.
Oversee validation of:
Analog block level validation – PMU (LDO, DCDC, GDET, FRO, OSC, References etc) , CGU (PLL etc) , ADC/DAC, WBIAS.
System level validation and key customer MCU use cases validation
Drive ATE and bench correlation.
Low power optimizations to meet KPIs
Ensure robust test plans, coverage models, and sign-off criteria.
Own validation readiness for tape-out, risk production, and mass production.
Set clear goals, KPIs, and execution frameworks for validation programs.
Partner closely with:
Design & Architecture teams
Product Engineering
Firmware/Software teams
Manufacturing & Quality
Standardize validation methodologies across sites.
Provide regular program updates to senior leadership.
Job Qualification
Bachelor’s or Master’s degree in Electrical/Electronics/Computer Engineering (or related).
10–13+ years of experience in semiconductor validation (analog), product engineering, or silicon debug.
Strong hands-on background in:
MCU architectures
Embedded systems
Lab bring-up and silicon debug tools (JTAG, logic analyzers, scopes, etc.)
Proven ability to lead large, distributed engineering teams.
Excellent communication and executive presence
More information about NXP in India...
Show more Show less
Lead first-silicon bring-up, debug, and issue resolution.
Oversee validation of:
Analog block level validation – PMU (LDO, DCDC, GDET, FRO, OSC, References etc) , CGU (PLL etc) , ADC/DAC, WBIAS.
System level validation and key customer MCU use cases validation
Drive ATE and bench correlation.
Low power optimizations to meet KPIs
Ensure robust test plans, coverage models, and sign-off criteria.
Own validation readiness for tape-out, risk production, and mass production.
Set clear goals, KPIs, and execution frameworks for validation programs.
Partner closely with:
Design & Architecture teams
Product Engineering
Firmware/Software teams
Manufacturing & Quality
Standardize validation methodologies across sites.
Provide regular program updates to senior leadership.
Job Qualification
Bachelor’s or Master’s degree in Electrical/Electronics/Computer Engineering (or related).
10–13+ years of experience in semiconductor validation (analog), product engineering, or silicon debug.
Strong hands-on background in:
MCU architectures
Embedded systems
Lab bring-up and silicon debug tools (JTAG, logic analyzers, scopes, etc.)
Proven ability to lead large, distributed engineering teams.
Excellent communication and executive presence
More information about NXP in India...
Show more Show less
Similar Jobs
M
MTS, Analog Design Engineering
Micron · Boise, United States, North America
M
Senior Engineer, STPG PE (FDV-Verilog)
Micron · Singapore, Singapore, Asia
M
Digital IC Design Engineer - Early Career
Marvell · Westborough, United States, North America
M
Staff Firmware/Software Engineer- Embedded SoC/Microcontroller/DSP/SERDES/AEC/Microled/ODSP/PHY/AI Connectivity
Marvell · Santa Clara, United States, North America