XP

Senior Physical Design Engineer

Accepting applications

XQwave Pvt Ltd (Formerly Obsidian Solutions Pvt Ltd) · Bengaluru, Karnataka, India

Full-Time Mid_senior ASICRTLVLSIanalogmentor
Estimated market salary
₹20-36 LPA

This is a SiliconBoard market estimate, not an employer-posted salary.

Posted
11h ago
Category
Design
Experience
Mid_senior
Country
India
Company Description XQwave Pvt Ltd (Formerly Obsidian Solutions) is a technology consulting company specializing in semiconductor ASIC design services and embedded software development, delivering expertise from specification through design and development to first-pass silicon success. The company partners with customers to accelerate time-to-market while supporting new product innovation and competitive differentiation. With a deep understanding of the semiconductor industry, access to current and emerging technologies, and mature development processes, XQwave builds complete solutions that enable customer success. The organization is founded and led by professionals with over 100 years of combined experience across design, verification, physical design, analog, and embedded software, creating a strong environment for technical growth and mentorship.
Role Description This is a full-time, on-site Senior Physical Design Engineer role based in Bengaluru. The individual in this role will lead and execute end-to-end physical design tasks, including floorplanning, partitioning, placement, clock tree synthesis, routing, and timing closure for complex ASIC projects. Responsibilities include collaborating closely with RTL, logic, and verification teams to ensure design quality and consistency, running and analyzing physical verification checks, and driving optimization for power, performance, and area. The senior engineer will participate in design reviews, contribute to methodology improvements, support tape-out activities, and mentor junior engineers in best practices for physical design and implementation.
Qualifications
Strong expertise in Physical Design and Physical Verification for advanced technology nodes.
Solid understanding of Logic Design and Circuit Design principles for digital integrated circuits.
Hands-on experience with RTL Design flows and collaboration with RTL and verification teams.
Proficiency with industry-standard EDA tools for synthesis, place-and-route, STA, and sign-off.
Demonstrated ability to achieve timing closure and optimize for power, performance, and area.
Bachelor’s or Master’s degree in Electrical Engineering, Electronics, VLSI, or a related field.
Experience leading complex ASIC projects and mentoring engineering team members.
Strong problem-solving skills, attention to detail, and ability to work effectively in a collaborative environment.
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