S
Senior Physical Design Engineer
Accepting applicationsSEMIFIVE · Bengaluru, Karnataka, India
Full-Time Mid_senior DFTMentorRTLSoCVLSI
Posted
1 Jun
Category
Design
Experience
Mid_senior
Country
India
SoC STA & Synthesis – Senior Engineer
About Semifiv
eFounded in Seoul in 2019, SEMIFIVE is basing its foundation on Korea’s semiconductor design competency that was amassed for more than 20 years. With expertise spanning front-end to back-end design, SEMIFIVE has become the fastest growing silicon design company that offers the most comprehensive design solutions. SEMIFIVE’s core business is its innovative SoC Platform that enables low-cost and high-efficiency SoC design, and also provides full turnkey silicon design services for global customers
.As the cost of developing an SoC and the demand for customized silicon continue to grow rapidly, SEMIFIVE’s SoC Platform plays a critical role in turning innovative ideas into silicon. SEMIFIVE works closely with global technology leaders and is rapidly emerging as The New Global Hub of Custom Silicon
.Semifive India Design Centre, headquartered in Bangalore, is a rapidly growing capability centre responsible for delivering complex, multi-node SoC programs for global customers across the US, Europe, and Asia. The India team owns front-end through back-end execution, including RTL, STA, synthesis, physical design, and signoff for turnkey silicon programs
.
Key Responsibilit
ies
SoC Timing & Synthesis Execu
tionContribute to SoC-level timing closure for complex, multi-million gate desi
gns.Perform top-level and block-level STA and synthesis activities across proje
cts.Support timing budgeting, constraints development, and closure strateg
ies.Participate in timing signoff activities and ensure quality deliv
ery.Execution & Technical Owner
shipDrive multi-mode multi-corner (MMMC) timing signoff, including functional, scan, and low-power mo
des.Own constraint development and validation (SDC) at block and SoC le
vel.Lead timing convergence across pre-CTS, post-CTS, and post-route sta
ges.Partner closely with physical design, clocking, power, and DFT teams to resolve complex timing challen
ges.Guide synthesis strategy including hierarchical vs flat synthesis, QoR optimization, and ECO methodolog
ies.Cross-Functional & Foundry Collabora
tionWork closely with RTL, DFT, PD, package, and foundry teams to ensure end-to-end timing clos
ure.Interface with foundry and EDA vendors on advanced node timing issues, signoff rules, and best practi
ces.Support customer design reviews, timing signoff discussions, and technical escalati
ons.Methodology & Team Develop
mentDefine and standardize STA and synthesis methodologies across Semifive progr
ams.Develop automation, checks, and best practices for scalable and predictable timing clos
ure.Mentor and guide STA and synthesis engineers, building strong technical depth within the t
eam.Review and approve timing signoff checklists, reports, and tapeout readin
ess.
Qualifica
tions
B.E./B.Tech or M.E./M.Tech in Electrical / Electronics / VLSI Engine
ering.4-12 years of experience in STA, synthesis, and timing closure for complex
SoCs.Proven track record of owning top-level timing closure on multiple successful SoC tap
eouts.Strong experti
se in:Static Timing Analysis (PrimeTime or equiv
alent)Synthesis flows (Design Compiler, Fusion Com
piler)MMMC analysis and advanced constraint devel
opmentDeep understandi
ng of:Clocking architectures (multiple clocks, generated clocks, CDC implica
tions)Low-power design and timing interactions (UP
F/CPF)Scan and test-mode timing c
losureECO flows and late-stage timing
fixesExperience working on advanced technology nodes (12nm and b
elow).Strong debugging, analytical, and problem-solving s
kills.Excellent communication skills with ability to lead cross-functional and global
teams.
Why J
oin Us?
At Semifive, you will play a critical technical leadership role in delivering first-time-right silicon for global customers. Unlike traditional large semiconductor organizations, Semifive offers broad ownership and real impact, where timing and synthesis leaders directly influence architecture, implementation strategy, and final silicon
quality.As part of Semifive India, you will work on multiple complex SoCs, partner with world-class engineering teams across geographies, and help build scalable STA and synthesis methodologies for a rapidly growing organ
ization.This role offers the opportunity to shape not just individual chips — but how silicon is built at S
emifive.
Show more Show less
About Semifiv
eFounded in Seoul in 2019, SEMIFIVE is basing its foundation on Korea’s semiconductor design competency that was amassed for more than 20 years. With expertise spanning front-end to back-end design, SEMIFIVE has become the fastest growing silicon design company that offers the most comprehensive design solutions. SEMIFIVE’s core business is its innovative SoC Platform that enables low-cost and high-efficiency SoC design, and also provides full turnkey silicon design services for global customers
.As the cost of developing an SoC and the demand for customized silicon continue to grow rapidly, SEMIFIVE’s SoC Platform plays a critical role in turning innovative ideas into silicon. SEMIFIVE works closely with global technology leaders and is rapidly emerging as The New Global Hub of Custom Silicon
.Semifive India Design Centre, headquartered in Bangalore, is a rapidly growing capability centre responsible for delivering complex, multi-node SoC programs for global customers across the US, Europe, and Asia. The India team owns front-end through back-end execution, including RTL, STA, synthesis, physical design, and signoff for turnkey silicon programs
.
Key Responsibilit
ies
SoC Timing & Synthesis Execu
tionContribute to SoC-level timing closure for complex, multi-million gate desi
gns.Perform top-level and block-level STA and synthesis activities across proje
cts.Support timing budgeting, constraints development, and closure strateg
ies.Participate in timing signoff activities and ensure quality deliv
ery.Execution & Technical Owner
shipDrive multi-mode multi-corner (MMMC) timing signoff, including functional, scan, and low-power mo
des.Own constraint development and validation (SDC) at block and SoC le
vel.Lead timing convergence across pre-CTS, post-CTS, and post-route sta
ges.Partner closely with physical design, clocking, power, and DFT teams to resolve complex timing challen
ges.Guide synthesis strategy including hierarchical vs flat synthesis, QoR optimization, and ECO methodolog
ies.Cross-Functional & Foundry Collabora
tionWork closely with RTL, DFT, PD, package, and foundry teams to ensure end-to-end timing clos
ure.Interface with foundry and EDA vendors on advanced node timing issues, signoff rules, and best practi
ces.Support customer design reviews, timing signoff discussions, and technical escalati
ons.Methodology & Team Develop
mentDefine and standardize STA and synthesis methodologies across Semifive progr
ams.Develop automation, checks, and best practices for scalable and predictable timing clos
ure.Mentor and guide STA and synthesis engineers, building strong technical depth within the t
eam.Review and approve timing signoff checklists, reports, and tapeout readin
ess.
Qualifica
tions
B.E./B.Tech or M.E./M.Tech in Electrical / Electronics / VLSI Engine
ering.4-12 years of experience in STA, synthesis, and timing closure for complex
SoCs.Proven track record of owning top-level timing closure on multiple successful SoC tap
eouts.Strong experti
se in:Static Timing Analysis (PrimeTime or equiv
alent)Synthesis flows (Design Compiler, Fusion Com
piler)MMMC analysis and advanced constraint devel
opmentDeep understandi
ng of:Clocking architectures (multiple clocks, generated clocks, CDC implica
tions)Low-power design and timing interactions (UP
F/CPF)Scan and test-mode timing c
losureECO flows and late-stage timing
fixesExperience working on advanced technology nodes (12nm and b
elow).Strong debugging, analytical, and problem-solving s
kills.Excellent communication skills with ability to lead cross-functional and global
teams.
Why J
oin Us?
At Semifive, you will play a critical technical leadership role in delivering first-time-right silicon for global customers. Unlike traditional large semiconductor organizations, Semifive offers broad ownership and real impact, where timing and synthesis leaders directly influence architecture, implementation strategy, and final silicon
quality.As part of Semifive India, you will work on multiple complex SoCs, partner with world-class engineering teams across geographies, and help build scalable STA and synthesis methodologies for a rapidly growing organ
ization.This role offers the opportunity to shape not just individual chips — but how silicon is built at S
emifive.
Show more Show less