AD
Senior Physical Design Engineer
Accepting applicationsACL Digital · Hyderabad, Telangana, India
Full-Time Mid_senior CadenceInnovusPERLPythonSynopsys
Estimated market salary
₹52-94 LPA
This is a SiliconBoard market estimate, not an employer-posted salary.
Posted
15 Jun
Category
Design
Experience
Mid_senior
Country
India
Physical Design (PNR) Engineers
Experience : 5 years
Location : Hyderabad.
Job Description: PnR Design Engineer position focusing on advanced technology nodes and Place& Route workflow support.
Job descriptions:
• Technology nodes and workflow support: The engineers will support Place and Route workflows for designs at 6nm, 3nm, and 2nm technology nodes, including qualifying tool versions, deploying new features, and updating workflows to incorporate new capabilities.
• Required skills and tools: Candidates must be proficient with tools such as Synopsys Fusion Compiler, Cadence Innovus, and Cerebrus. They should have a strong understanding of low power flows and be skilled in scripting languages like PERL, TCL, and Python, along with experience in synthesis, Place and Route workflows, STA, and physical verification tools.
• Job deliverables: Responsibilities include PnR flow qualification and support, running multiple PnR blocks for benchmarking, PPA push and design correlation with STA, EMIR, and PDV signoff flows.
Please note 2nm and 3nm TSMC NDA required.
Interested,please share your updated resume to janagaradha.n@acldigital.com
Show more Show less
Experience : 5 years
Location : Hyderabad.
Job Description: PnR Design Engineer position focusing on advanced technology nodes and Place& Route workflow support.
Job descriptions:
• Technology nodes and workflow support: The engineers will support Place and Route workflows for designs at 6nm, 3nm, and 2nm technology nodes, including qualifying tool versions, deploying new features, and updating workflows to incorporate new capabilities.
• Required skills and tools: Candidates must be proficient with tools such as Synopsys Fusion Compiler, Cadence Innovus, and Cerebrus. They should have a strong understanding of low power flows and be skilled in scripting languages like PERL, TCL, and Python, along with experience in synthesis, Place and Route workflows, STA, and physical verification tools.
• Job deliverables: Responsibilities include PnR flow qualification and support, running multiple PnR blocks for benchmarking, PPA push and design correlation with STA, EMIR, and PDV signoff flows.
Please note 2nm and 3nm TSMC NDA required.
Interested,please share your updated resume to janagaradha.n@acldigital.com
Show more Show less
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