SI
Senior Mixed-Signal Design Engineer
Accepting applicationsSpanidea Inc · San Jose, CA
Contract Mid_senior CadenceEthernetMixed-SignalPCIeSerDes
Posted
2d ago
Category
Design
Experience
Mid_senior
Country
United States
Senior Mixed-Signal Design Engineer – High-Speed SerDes
Location: San Jose, CA
We are seeking a Senior Mixed-Signal Design Engineer to design and develop high-speed SerDes analog and mixed-signal circuits for next-generation semiconductor products.
Key Responsibilities
Design and optimize PLL, DLL, CDR, TX, RX, DFE, AFE, and CTLE circuit blocks.
Perform circuit simulation, verification, silicon bring-up, and lab characterization.
Analyze jitter, noise, and signal integrity to improve performance.
Collaborate with digital, layout, and system teams to deliver production-quality designs.
Requirements
MS/PhD in Electrical Engineering or related field.
5+ years of experience in analog/mixed-signal IC design.
Strong hands-on experience with SerDes, PLL, CDR, DFE, TX/RX, or CTLE.
Proficiency with Cadence Virtuoso/Spectre or similar EDA tools.
Experience with silicon validation and laboratory testing.
Excellent debugging, analytical, and communication skills.
Preferred: Experience with PCIe, Ethernet, USB, CXL, or other multi-Gbps high-speed interfaces.
Show more Show less
Location: San Jose, CA
We are seeking a Senior Mixed-Signal Design Engineer to design and develop high-speed SerDes analog and mixed-signal circuits for next-generation semiconductor products.
Key Responsibilities
Design and optimize PLL, DLL, CDR, TX, RX, DFE, AFE, and CTLE circuit blocks.
Perform circuit simulation, verification, silicon bring-up, and lab characterization.
Analyze jitter, noise, and signal integrity to improve performance.
Collaborate with digital, layout, and system teams to deliver production-quality designs.
Requirements
MS/PhD in Electrical Engineering or related field.
5+ years of experience in analog/mixed-signal IC design.
Strong hands-on experience with SerDes, PLL, CDR, DFE, TX/RX, or CTLE.
Proficiency with Cadence Virtuoso/Spectre or similar EDA tools.
Experience with silicon validation and laboratory testing.
Excellent debugging, analytical, and communication skills.
Preferred: Experience with PCIe, Ethernet, USB, CXL, or other multi-Gbps high-speed interfaces.
Show more Show less