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Senior/Lead Design Verification Engineer (Hyd/Bangalore)
Accepting applicationsMirafra Technologies · Hyderabad, Telangana, India
Full-Time Mid_senior PerlPythonRTLSystemVerilogTcl
Estimated market salary
₹46-83 LPA
This is a SiliconBoard market estimate, not an employer-posted salary.
Posted
3d ago
Category
Verification
Experience
Mid_senior
Country
India
Company Description Mirafra Technologies is a technology consulting company specializing in semiconductor design services, embedded software development, and digital transformation. With a strong team of over 1,000 engineers, the company is headquartered in Bangalore and has offices in Hyderabad, Chennai, Pune, the United States, Singapore, and Sweden. Mirafra engineers have successfully delivered hundreds of complex projects and are known for solving challenging technical problems. The company emphasizes hiring top talent and providing continuous training and development. Mirafra maintains long-term collaborations with customers ranging from startups to leading global semiconductor companies, including multiple engagements spanning more than four to eight years.
Role Description This is a full-time, on-site role for a Design Verification Engineer based in Hyderabad. The Design Verification Engineer will be responsible for understanding design specifications and creating detailed verification plans. Daily tasks include developing testbenches, writing and running test cases, creating assertions and coverage models, and debugging failures at the block and subsystem level. The role involves close collaboration with design, architecture, and validation teams to ensure functional correctness, performance, and quality standards are met. The engineer will also contribute to automation, regression setup, documentation, and continuous improvement of verification methodologies and flows.
Qualifications
Strong knowledge of digital design fundamentals, including logic design, RTL concepts, and hardware description languages (e.g., Verilog, SystemVerilog).
Experience with verification methodologies and environments, such as UVM/SystemVerilog, constrained random verification, coverage-driven verification, and assertion-based verification.
Familiarity with simulation and EDA tools commonly used in design verification, along with experience in debugging at waveform and RTL levels.
Proficiency in scripting or programming (e.g., Python, Perl, Tcl, or shell scripting) to automate verification tasks, regressions, and data analysis.
Ability to interpret and validate complex specifications, write clear documentation, and communicate effectively with cross-functional engineering teams.
Bachelor’s or Master’s degree in Electronics, Electrical Engineering, Computer Engineering, or a related discipline, or equivalent practical experience.
Experience in verification of SoCs, IP blocks, or subsystems (e.g., CPU, memory controllers, high-speed interfaces, or peripherals) is highly desirable.
Strong problem-solving mindset, attention to detail, and willingness to learn new technologies and methodologies in a fast-paced environment.
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Role Description This is a full-time, on-site role for a Design Verification Engineer based in Hyderabad. The Design Verification Engineer will be responsible for understanding design specifications and creating detailed verification plans. Daily tasks include developing testbenches, writing and running test cases, creating assertions and coverage models, and debugging failures at the block and subsystem level. The role involves close collaboration with design, architecture, and validation teams to ensure functional correctness, performance, and quality standards are met. The engineer will also contribute to automation, regression setup, documentation, and continuous improvement of verification methodologies and flows.
Qualifications
Strong knowledge of digital design fundamentals, including logic design, RTL concepts, and hardware description languages (e.g., Verilog, SystemVerilog).
Experience with verification methodologies and environments, such as UVM/SystemVerilog, constrained random verification, coverage-driven verification, and assertion-based verification.
Familiarity with simulation and EDA tools commonly used in design verification, along with experience in debugging at waveform and RTL levels.
Proficiency in scripting or programming (e.g., Python, Perl, Tcl, or shell scripting) to automate verification tasks, regressions, and data analysis.
Ability to interpret and validate complex specifications, write clear documentation, and communicate effectively with cross-functional engineering teams.
Bachelor’s or Master’s degree in Electronics, Electrical Engineering, Computer Engineering, or a related discipline, or equivalent practical experience.
Experience in verification of SoCs, IP blocks, or subsystems (e.g., CPU, memory controllers, high-speed interfaces, or peripherals) is highly desirable.
Strong problem-solving mindset, attention to detail, and willingness to learn new technologies and methodologies in a fast-paced environment.
Show more Show less
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