SP
Senior Lead - Analog Layout Engineer
Accepting applicationsSiMaxTech Pvt Ltd · Bengaluru South, Karnataka, India
Full-Time Mid_senior AnalogCadenceMentorRTLSoC
Estimated market salary
₹59-106 LPA
This is a SiliconBoard market estimate, not an employer-posted salary.
Posted
6d ago
Category
Design
Experience
Mid_senior
Country
India
Company Description SiMaxTech Pvt Ltd is a fast-growing semiconductor design services company that delivers end-to-end chip solutions to global customers. The organization has strong capabilities across the semiconductor design spectrum, including Analog Circuit Design, RTL Design, Design Verification, Custom Layout, Physical Design, and Embedded Design. With expertise spanning mature nodes like 28nm, 40nm, and 65nm, as well as advanced nodes such as 7nm, 5nm, 3nm, 2nm, and 18A, SiMaxTech supports next-generation, high-performance products with quality and faster time-to-market. The company offers comprehensive services covering front-end and back-end design, AMS verification, and full-chip and SoC backend design, enabling holistic and scalable solutions across the chip development lifecycle. Guided by a vision to be the preferred semiconductor design services partner worldwide, SiMaxTech emphasizes continuous learning, innovation, and execution excellence in a customer-centric environment.
We're Hiring, #SeniorLead #AnalogLayout
Senior Lead - Analog Layout Engineer,
Experience: 12+Years
Location : Bangalore
Notice Period : Immediate
Role Description This is a full-time, on-site role for a Senior Lead - Analog Layout Engineer based in Bengaluru South. The person in this role will be responsible for leading and executing complex analog and mixed-signal custom layout designs, ensuring adherence to design rules, performance targets, and reliability requirements. Day-to-day responsibilities include collaborating closely with circuit design engineers, translating schematics into optimized layouts, performing layout checks, and driving physical verification activities such as DRC, LVS, and ERC. The role involves mentoring and guiding junior layout engineers, reviewing their work for quality and consistency, and contributing to layout methodologies and best practices across multiple technology nodes. The Senior Lead will also coordinate with cross-functional teams to support tape-out schedules, resolve layout-related issues, and help improve productivity through automation and tool flow enhancements.
Qualifications
Strong skills in Layout Design and Custom Layout for analog and mixed-signal blocks, including floorplanning and layout optimization.
Proficiency in Circuit Design, Analog, and Analog Circuits, with the ability to understand schematics and translate them into high-quality layouts.
Hands-on experience with Physical Verification, including DRC, LVS, ERC, and reliability checks across multiple technology nodes.
Practical knowledge of semiconductor process technologies from mature to advanced nodes (e.g., 65nm to 5nm and beyond) and associated design rules.
Experience using industry-standard EDA tools for analog layout and verification (such as Cadence Virtuoso, Mentor/Siemens, Synopsys tools).
Proven ability to lead projects, mentor team members, and collaborate effectively with cross-functional engineering teams.
Strong analytical, problem-solving, and communication skills, with attention to detail and a focus on design quality and schedule adherence.
Show more Show less
We're Hiring, #SeniorLead #AnalogLayout
Senior Lead - Analog Layout Engineer,
Experience: 12+Years
Location : Bangalore
Notice Period : Immediate
Role Description This is a full-time, on-site role for a Senior Lead - Analog Layout Engineer based in Bengaluru South. The person in this role will be responsible for leading and executing complex analog and mixed-signal custom layout designs, ensuring adherence to design rules, performance targets, and reliability requirements. Day-to-day responsibilities include collaborating closely with circuit design engineers, translating schematics into optimized layouts, performing layout checks, and driving physical verification activities such as DRC, LVS, and ERC. The role involves mentoring and guiding junior layout engineers, reviewing their work for quality and consistency, and contributing to layout methodologies and best practices across multiple technology nodes. The Senior Lead will also coordinate with cross-functional teams to support tape-out schedules, resolve layout-related issues, and help improve productivity through automation and tool flow enhancements.
Qualifications
Strong skills in Layout Design and Custom Layout for analog and mixed-signal blocks, including floorplanning and layout optimization.
Proficiency in Circuit Design, Analog, and Analog Circuits, with the ability to understand schematics and translate them into high-quality layouts.
Hands-on experience with Physical Verification, including DRC, LVS, ERC, and reliability checks across multiple technology nodes.
Practical knowledge of semiconductor process technologies from mature to advanced nodes (e.g., 65nm to 5nm and beyond) and associated design rules.
Experience using industry-standard EDA tools for analog layout and verification (such as Cadence Virtuoso, Mentor/Siemens, Synopsys tools).
Proven ability to lead projects, mentor team members, and collaborate effectively with cross-functional engineering teams.
Strong analytical, problem-solving, and communication skills, with attention to detail and a focus on design quality and schedule adherence.
Show more Show less