Senior Layout Engineer

About the Company
LeadSoC Technologies offers cutting edge Engineering Design services in VLSI and Embedded Systems. We have been growing rapidly over the last 7 years to meet the evolving needs of the Semiconductor, Automotive, Telecom and Consumer Electronics segments. Our End-to-End VLSI design services span Micro Architecture to Tape Out and beyond with Post Silicon support. We have been involved in co-development of multiple SOC releases for our clients. LeadSoC has in house VLSI labs equipped with state of art tools (from leading EDA OEM’s) for grooming talent. We work on SOC’s, FPGA and ASIC platforms in areas spanning Digital Front End Design & Verification, Back End Design (RTL=> GDS), Analog & Custom Design & Verification. We also work on RF & Board Design for OEMs.

Responsibilities
Proficiency in using Cadence VXL on Analog & Mixed signal blocks.
Strong debug and problem-solving skills for physical verification of custom layout (LVS, DRC & other Layout issues).
Hands-on experience in creating layouts of critical analog blocks such as Temperature sensors, PLL, ADC, DAC, LDO, Bandgap Ref Generators, Charge Pump, Current Mirrors, Oscillators, Comparator, Differential Amplifier etc.
Hands-on experience in creating layouts of critical high-speed circuits such as Tx, Rx, clock generators.
Good understanding of Analog Layout fundamentals such as Matching, Electro-migration, Latch-up, coupling, crosstalk, IR-drop, active and passive parasitic devices etc.
Good understanding of layout effects on the circuit such as Speed, Capacitance, Power, and Area etc.
Manage the layout process including floor-planning, placement, and routing.
Good understanding of the Design rules and deliveries with quality layout.
Execute secondary layout tasks such as ECO, LCO and DFM.
Good verbal and written communication skills.


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