IT
Senior IP DV Engineer- High-Speed Protocols
Accepting applicationsIravan Technologies · Pune Division, Maharashtra, India
Full-Time Mid_senior DDREthernetMixed-SignalPCIeSystemVerilog
Posted
1 Jun
Category
Verification
Experience
Mid_senior
Country
India
About Iravan
Iravan Technologies, headquartered in Pune, is a semiconductor design services company specializing in Mixed-Signal, Digital, and Formal Verification. We partner with leading companies across Storage, Networking, Aerospace, Automotive, Defense, and other critical industries to deliver advanced semiconductor solutions.
Designation -Senior IP DV Engineer
Experience: 4.5Y+ - 7 years
Location: India
Role: Looking for an IP Verification Engineer with strong expertise in high-speed protocols to
develop and execute verification for complex IPs.
Key Skills:
Strong SystemVerilog & UVM experience
Hands-on with protocols like PCIe, USB, Ethernet, MIPI, DDR
Testbench development, debugging, and coverage closure
Experience with VIP integration and simulation tools
Responsibilities:
Develop UVM-based verification environments
Create test plans, testcases, and debug failures
Perform functional and coverage closure
Collaborate with design/architecture teams
Interested candidates may share resumes at careers@iravan.tech - (Immediate to 30-day notice period candidates preferred)
Show more Show less
Iravan Technologies, headquartered in Pune, is a semiconductor design services company specializing in Mixed-Signal, Digital, and Formal Verification. We partner with leading companies across Storage, Networking, Aerospace, Automotive, Defense, and other critical industries to deliver advanced semiconductor solutions.
Designation -Senior IP DV Engineer
Experience: 4.5Y+ - 7 years
Location: India
Role: Looking for an IP Verification Engineer with strong expertise in high-speed protocols to
develop and execute verification for complex IPs.
Key Skills:
Strong SystemVerilog & UVM experience
Hands-on with protocols like PCIe, USB, Ethernet, MIPI, DDR
Testbench development, debugging, and coverage closure
Experience with VIP integration and simulation tools
Responsibilities:
Develop UVM-based verification environments
Create test plans, testcases, and debug failures
Perform functional and coverage closure
Collaborate with design/architecture teams
Interested candidates may share resumes at careers@iravan.tech - (Immediate to 30-day notice period candidates preferred)
Show more Show less
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