TL
Senior IC Layout Engineer (TSMC 12/16nm)
Accepting applicationsTechnical Link LLC · Dallas, TX
Full-Time Senior AICadenceCalibreFinFETRF
Posted
2d ago
Category
Design
Experience
Senior
Country
United States
Plano, TX (right outside Dallas)
Duration – 3 months
Manager Feedback
I need TSMC12/16 expertise that can start asap with 100% familiarity with the node
I am looking for a layout engineer to cover an overload. The need is to have experience in TSMC12/16 or TSMC lower nodes.
Position Overview
We are seeking an experienced IC Layout Engineer to support a high-priority project and help address increased design workload. The ideal candidate will have strong custom IC layout experience with advanced TSMC process technologies and a proven track record of delivering high-quality layouts in complex semiconductor designs.
Key Responsibilities
Perform custom IC layout design for analog, mixed-signal, and/or digital integrated circuits.
Create and verify transistor-level layouts while ensuring compliance with foundry design rules.
Work closely with design, verification, and physical design teams to achieve performance, area, and reliability targets.
Execute layout verification activities including DRC, LVS, ERC, and parasitic extraction.
Support layout optimization for performance, power, and manufacturability.
Collaborate with cross-functional teams to meet project schedules and tapeout milestones.
Required Qualifications
Proven experience as an IC Layout Engineer in advanced semiconductor process technologies.
Hands-on layout experience with TSMC 12nm, 16nm, or more advanced process nodes.
Strong understanding of semiconductor fabrication processes and physical design methodologies.
Experience performing DRC, LVS, and parasitic extraction signoff.
Proficiency with industry-standard EDA tools such as Cadence Virtuoso and Calibre.
Ability to work independently and contribute immediately in a fast-paced development environment.
Preferred Qualifications
Experience with FinFET technologies.
Background in high-speed, mixed-signal, RF, networking, AI/ML, or data center semiconductor products.
Prior tapeout experience in advanced TSMC nodes.
Strong communication and collaboration skills.
Duration
Contract opportunity with the potential for extension based on project needs.
Show more Show less
Duration – 3 months
Manager Feedback
I need TSMC12/16 expertise that can start asap with 100% familiarity with the node
I am looking for a layout engineer to cover an overload. The need is to have experience in TSMC12/16 or TSMC lower nodes.
Position Overview
We are seeking an experienced IC Layout Engineer to support a high-priority project and help address increased design workload. The ideal candidate will have strong custom IC layout experience with advanced TSMC process technologies and a proven track record of delivering high-quality layouts in complex semiconductor designs.
Key Responsibilities
Perform custom IC layout design for analog, mixed-signal, and/or digital integrated circuits.
Create and verify transistor-level layouts while ensuring compliance with foundry design rules.
Work closely with design, verification, and physical design teams to achieve performance, area, and reliability targets.
Execute layout verification activities including DRC, LVS, ERC, and parasitic extraction.
Support layout optimization for performance, power, and manufacturability.
Collaborate with cross-functional teams to meet project schedules and tapeout milestones.
Required Qualifications
Proven experience as an IC Layout Engineer in advanced semiconductor process technologies.
Hands-on layout experience with TSMC 12nm, 16nm, or more advanced process nodes.
Strong understanding of semiconductor fabrication processes and physical design methodologies.
Experience performing DRC, LVS, and parasitic extraction signoff.
Proficiency with industry-standard EDA tools such as Cadence Virtuoso and Calibre.
Ability to work independently and contribute immediately in a fast-paced development environment.
Preferred Qualifications
Experience with FinFET technologies.
Background in high-speed, mixed-signal, RF, networking, AI/ML, or data center semiconductor products.
Prior tapeout experience in advanced TSMC nodes.
Strong communication and collaboration skills.
Duration
Contract opportunity with the potential for extension based on project needs.
Show more Show less